Changeset 623 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/AdvAtaInit.asm

Timestamp:

Jun 15, 2022, 2:48:59 PM (22 months ago)

Author:

krille_n_

Message:

Changes:

• Reversed the change to IdeDPT.asm in r622 as it didn't work as intended.
• Reordered some procedures to reduce alignment padding.
• Added two new defines (EXTRA_LOOP_UNROLLING_SMALL and EXTRA_LOOP_UNROLLING_LARGE) that should improve transfer speeds for some hardware combinations, specifically 808x CPUs with any IDE controller using port I/O and any CPU with XT-IDE controllers.
• Added a new define (USE_086) for use with 8086 and V30 CPUs only. Unlike the other USE_x86 defines, this define will not change the instruction set used and is therefore compatible with all CPUs. However, it will apply padding to make jump destinations WORD aligned which should improve performance on 8086/V30 CPUs but on 8088/V20 CPUs there is no benefit and, in addition to wasting ROM space, it might in fact be slower on these machines. Since the vast majority of XT class machines are using 8088/V20 CPUs this define is not used in the official XT builds - it's primarily intended for custom BIOS builds.
• XTIDECFG: The URL to the support forum has been updated.

File:

• trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/AdvAtaInit.asm (modified) (2 diffs)

trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/AdvAtaInit.asm

@@ -188 +188 @@
 ; as I/O delay.
 ;
-; AdvAtaInit_InWithDelay
+; AdvAtaInit_InputWithDelay
 ;   Parameters:
 ;       DX:     Port to read from
@@ -195 +195 @@
 ;   Corrupts registers:
 ;       Nothing
-;--------------------------------------------------------------------   
+;--------------------------------------------------------------------
 AdvAtaInit_InputWithDelay:
     in      al, dx