Changeset 622 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/AdvAtaInit.asm

Timestamp:

Dec 16, 2021, 5:46:51 PM (3 years ago)

Author:

Tomi Tilli

Message:

• Supported VLB controllers are now forced to 32-bit mode on 386 builds only. AT builds use 16-bit transfers unless configured to 32-bit from xtidecfg
• Partially fixed support for PDC 20230C VLB IDE controller. PIO-1 drives stay at PIO-0 but PIO-2, 3 and 4 drives are set to maximum speed that PDC2030C supports
• Large 386 build is now 12k instead of 10k (did not fit to 10k because of the fixes)

File:

• trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/AdvAtaInit.asm (modified) (1 diff)

trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/AdvAtaInit.asm

@@ -182 +182 @@
 .PioTimingsLoadedToBXandCX:
     ret
+
+
+;--------------------------------------------------------------------
+; Just a simple IN AL, DX instruction but the function call works
+; as I/O delay.
+;
+; AdvAtaInit_InWithDelay
+;   Parameters:
+;       DX:     Port to read from
+;   Returns:
+;       AL:     Byte read from port
+;   Corrupts registers:
+;       Nothing
+;--------------------------------------------------------------------   
+AdvAtaInit_InputWithDelay:
+    in      al, dx
+    ret