[150] | 1 | ; Project name : XTIDE Universal BIOS |
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| 2 | ; Description : IDE Register I/O functions. |
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| 3 | |
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[376] | 4 | ; |
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| 5 | ; XTIDE Universal BIOS and Associated Tools |
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| 6 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team. |
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| 7 | ; |
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| 8 | ; This program is free software; you can redistribute it and/or modify |
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| 9 | ; it under the terms of the GNU General Public License as published by |
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| 10 | ; the Free Software Foundation; either version 2 of the License, or |
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| 11 | ; (at your option) any later version. |
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| 12 | ; |
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| 13 | ; This program is distributed in the hope that it will be useful, |
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| 14 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 15 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 16 | ; GNU General Public License for more details. |
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| 17 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
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| 18 | ; |
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| 19 | |
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[150] | 20 | ; Section containing code |
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| 21 | SECTION .text |
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| 22 | |
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| 23 | ;-------------------------------------------------------------------- |
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[332] | 24 | ; IdeIO_OutputALtoIdeControlBlockRegisterInDL |
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[150] | 25 | ; Parameters: |
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| 26 | ; AL: Byte to output |
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[400] | 27 | ; DL: IDE Control Block Register |
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[160] | 28 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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[150] | 29 | ; Returns: |
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| 30 | ; Nothing |
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| 31 | ; Corrupts registers: |
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[160] | 32 | ; BX, DX |
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[150] | 33 | ;-------------------------------------------------------------------- |
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[332] | 34 | IdeIO_OutputALtoIdeControlBlockRegisterInDL: |
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[400] | 35 | %ifdef MODULE_8BIT_IDE |
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| 36 | mov dh, [di+DPT_ATA.bDevice] |
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| 37 | %ifdef MODULE_JRIDE |
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| 38 | test dh, dh |
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| 39 | jnz SHORT .OutputToIoMappedIde |
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| 40 | |
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| 41 | add dx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET |
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| 42 | jmp SHORT OutputToJrIdeRegister |
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| 43 | .OutputToIoMappedIde: |
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| 44 | %endif |
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| 45 | %endif |
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| 46 | |
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[332] | 47 | mov bl, IDEVARS.wPortCtrl |
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[400] | 48 | jmp SHORT OutputALtoIdeRegisterInDLwithIdevarsOffsetToBasePortInBL |
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[332] | 49 | |
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[400] | 50 | |
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| 51 | ;-------------------------------------------------------------------- |
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| 52 | ; IdeIO_OutputALtoIdeRegisterInDL |
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| 53 | ; Parameters: |
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| 54 | ; AL: Byte to output |
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| 55 | ; DL: IDE Command Block Register |
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| 56 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 57 | ; Returns: |
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| 58 | ; Nothing |
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| 59 | ; Corrupts registers: |
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| 60 | ; BX, DX |
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| 61 | ;-------------------------------------------------------------------- |
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| 62 | ALIGN JUMP_ALIGN |
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[160] | 63 | IdeIO_OutputALtoIdeRegisterInDL: |
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[400] | 64 | %ifdef MODULE_8BIT_IDE |
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| 65 | mov dh, [di+DPT_ATA.bDevice] |
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| 66 | %ifdef MODULE_JRIDE |
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| 67 | test dh, dh |
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| 68 | jnz SHORT OutputALtoIOmappedIdeRegisterInDL |
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| 69 | |
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| 70 | add dx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET |
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| 71 | OutputToJrIdeRegister: |
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| 72 | mov bx, dx |
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| 73 | mov [cs:bx], al |
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| 74 | ret |
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| 75 | ALIGN JUMP_ALIGN |
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| 76 | OutputALtoIOmappedIdeRegisterInDL: |
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| 77 | %endif |
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| 78 | %endif |
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| 79 | |
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[181] | 80 | mov bl, IDEVARS.wPort |
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[400] | 81 | OutputALtoIdeRegisterInDLwithIdevarsOffsetToBasePortInBL: |
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| 82 | call GetIdePortToDX |
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[150] | 83 | out dx, al |
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| 84 | ret |
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| 85 | |
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| 86 | |
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| 87 | ;-------------------------------------------------------------------- |
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[400] | 88 | ; IdeIO_InputStatusRegisterToAL |
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| 89 | ; Parameters: |
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| 90 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 91 | ; Returns: |
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| 92 | ; AL: IDE Status Register contents |
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| 93 | ; Corrupts registers: |
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| 94 | ; BX, DX |
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| 95 | ;-------------------------------------------------------------------- |
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| 96 | ALIGN JUMP_ALIGN |
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| 97 | IdeIO_InputStatusRegisterToAL: |
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| 98 | mov dl, STATUS_REGISTER_in |
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| 99 | ; Fall to IdeIO_InputToALfromIdeRegisterInDL |
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| 100 | |
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| 101 | ;-------------------------------------------------------------------- |
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[160] | 102 | ; IdeIO_InputToALfromIdeRegisterInDL |
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[150] | 103 | ; Parameters: |
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[160] | 104 | ; DL: IDE Register |
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| 105 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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[150] | 106 | ; Returns: |
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| 107 | ; AL: Inputted byte |
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| 108 | ; Corrupts registers: |
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[160] | 109 | ; BX, DX |
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[150] | 110 | ;-------------------------------------------------------------------- |
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[160] | 111 | IdeIO_InputToALfromIdeRegisterInDL: |
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[400] | 112 | %ifdef MODULE_8BIT_IDE |
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| 113 | mov dh, [di+DPT_ATA.bDevice] |
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| 114 | %ifdef MODULE_JRIDE |
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| 115 | test dh, dh |
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| 116 | jnz SHORT .InputToALfromIOmappedIdeRegisterInDL |
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| 117 | |
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| 118 | add dx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET |
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| 119 | mov bx, dx |
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| 120 | mov al, [cs:bx] |
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| 121 | ret |
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| 122 | .InputToALfromIOmappedIdeRegisterInDL: |
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| 123 | %endif |
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| 124 | %endif |
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[181] | 125 | mov bl, IDEVARS.wPort |
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[400] | 126 | call GetIdePortToDX |
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[150] | 127 | in al, dx |
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| 128 | ret |
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[160] | 129 | |
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| 130 | |
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| 131 | ;-------------------------------------------------------------------- |
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[400] | 132 | ; GetIdePortToDX |
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[160] | 133 | ; Parameters: |
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[181] | 134 | ; BL: Offset to port in IDEVARS (IDEVARS.wPort or IDEVARS.wPortCtrl) |
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[400] | 135 | ; DH: Device Type (IDEVARS.bDevice) |
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[160] | 136 | ; DL: IDE Register |
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| 137 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 138 | ; Returns: |
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| 139 | ; DX: Source/Destination Port |
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| 140 | ; Corrupts registers: |
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| 141 | ; BX |
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| 142 | ;-------------------------------------------------------------------- |
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| 143 | ALIGN JUMP_ALIGN |
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[400] | 144 | GetIdePortToDX: |
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| 145 | %ifdef MODULE_8BIT_IDE |
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| 146 | ; Point CS:BX to IDEVARS |
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[181] | 147 | xor bh, bh |
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[400] | 148 | add bl, [di+DPT.bIdevarsOffset] ; CS:BX now points port address |
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[160] | 149 | |
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[400] | 150 | ; Load port address and check if A0 and A3 address lines need to be reversed |
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| 151 | cmp dh, DEVICE_8BIT_XTIDE_REV1 |
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| 152 | mov dh, bh ; DX now has IDE register offset |
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| 153 | jae SHORT .ReturnUntranslatedPortInDX ; No need to swap address lines |
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| 154 | |
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[160] | 155 | ; Exchange address lines A0 and A3 from DL |
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[400] | 156 | add dx, [cs:bx] ; DX now has port address |
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[160] | 157 | mov bl, dl |
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| 158 | mov bh, MASK_A3_AND_A0_ADDRESS_LINES |
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[400] | 159 | and bh, bl ; BH = 0, 1, 8 or 9, we can ignore 0 and 9 |
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| 160 | jz SHORT .ReturnTranslatedPortInDX ; Jump out since DH is 0 |
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[160] | 161 | xor bh, MASK_A3_AND_A0_ADDRESS_LINES |
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[400] | 162 | jz SHORT .ReturnTranslatedPortInDX ; Jump out since DH was 9 |
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[160] | 163 | and dl, ~MASK_A3_AND_A0_ADDRESS_LINES |
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[400] | 164 | or dl, bh ; Address lines now reversed |
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| 165 | .ReturnTranslatedPortInDX: |
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[160] | 166 | ret |
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[400] | 167 | |
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| 168 | .ReturnUntranslatedPortInDX: |
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| 169 | add dx, [cs:bx] |
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| 170 | ret |
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| 171 | |
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| 172 | %else ; Only standard IDE devices |
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| 173 | xor bh, bh |
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| 174 | xor dh, dh |
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| 175 | add bl, [di+DPT.bIdevarsOffset] ; CS:BX now points port address |
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| 176 | add dx, [cs:bx] ; DX now has port address |
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| 177 | ret |
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| 178 | %endif |
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