Changeset 536 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm
- Timestamp:
- Apr 10, 2013, 6:27:15 PM (12 years ago)
- google:author:
- krille_n_@hotmail.com
- File:
-
- 1 edited
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trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm
r526 r536 61 61 je SHORT .ReverseA0andA3fromRegisterIndexInDX 62 62 63 eSHL_IM dx, 1 ; ADP50L and XT-CF 63 64 cmp al, DEVICE_8BIT_JRIDE_ISA 64 jne SHORT .ShlRegisterIndexInDX ; All XT-CF modes 65 ; Fall to .InputToALfromMemoryMappedRegisterInDX 66 67 .InputToALfromMemoryMappedRegisterInDX: 65 jb SHORT .InputToALfromRegisterInDX ; All XT-CF modes 66 mov bh, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8 67 je SHORT .InputToALfromMemoryMappedRegisterInBX 68 mov bl, dl 69 mov bh, ADP50L_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8 70 71 .InputToALfromMemoryMappedRegisterInBX: 68 72 push ds 69 mov ds, [di+DPT.wBasePort] ; Segment for JR-IDE/ISA 70 mov al, [bx +JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET]73 mov ds, [di+DPT.wBasePort] ; Segment for JR-IDE/ISA and ADP50L 74 mov al, [bx] 71 75 pop ds 72 76 ret … … 75 79 .ReverseA0andA3fromRegisterIndexInDX: 76 80 mov dl, [cs:bx+g_rgbSwapA0andA3fromIdeRegisterIndex] 77 SKIP2B bx ; Skip shl dx, 178 79 .ShlRegisterIndexInDX:80 eSHL_IM dx, 181 ; Fall to .InputToALfromRegisterInDX82 81 83 82 .InputToALfromRegisterInDX: … … 108 107 je SHORT .ReverseA0andA3fromRegisterIndexInDX 109 108 109 ; At this point remaining controllers (JRIDE, XTCF and ADP50L) all have a control 110 ; block offset of 8 or (8<<1) so we add 8 here and do the SHL 1 later if needed. 111 add dx, 8 110 112 cmp bl, DEVICE_8BIT_JRIDE_ISA 111 jne SHORT .ShlRegisterIndexInDX ; All XT-CF modes 112 ; Fall to .OutputALtoMemoryMappedRegisterInDX 113 114 .OutputALtoMemoryMappedRegisterInDX: 115 mov bx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET 116 jmp SHORT IdeIO_OutputALtoIdeRegisterInDL.OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX 113 jb SHORT IdeIO_OutputALtoIdeRegisterInDL.ShlRegisterIndexInDXandOutputAL ; All XT-CF modes 114 mov bx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET - 8 ; Zeroes BL. -8 compensates for the ADD 115 je SHORT IdeIO_OutputALtoIdeRegisterInDL.OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX 116 ; The commented instructions below shows what happens next (saved for clarity) but as an optimization 117 ; we can accomplish the same thing with this jump. 118 jmp SHORT IdeIO_OutputALtoIdeRegisterInDL.ShlDXandMovHighByteOfADP50LoffsetsToBH 119 ; eSHL_IM dx, 1 120 ; mov bh, (ADP50L_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET - 16) >> 8 ; -16 compensates for the ADD and SHL 121 ; jmp SHORT IdeIO_OutputALtoIdeRegisterInDL.OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX 117 122 %endif 118 123 … … 122 127 ; a small trick since we only access Device Control Register at 123 128 ; offset 6h: Always clear A3 and set A0. 129 mov bh, dh ; Zero BH 124 130 add dx, [cs:bx+IDEVARS.wControlBlockPort] 125 131 xor dl, 1001b ; Clear A3, Set A0 126 jmp SHORT OutputALtoPortInDX 127 128 .ShlRegisterIndexInDX: 129 eSHL_IM dx, 1 130 add dx, BYTE XTCF_CONTROL_BLOCK_OFFSET 131 jmp SHORT OutputALtoRegisterInDX 132 out dx, al 133 ret 132 134 133 135 .OutputALtoControlBlockRegisterInDX: 134 call AccessDPT_GetIdevarsToCSBX 136 call AccessDPT_GetIdevarsToCSBX ; *FIXME* Why is this call here but not in the above block? 135 137 add dx, [cs:bx+IDEVARS.wControlBlockPort] 136 jmp SHORT OutputALtoPortInDX 138 out dx, al 139 ret 137 140 138 141 … … 160 163 161 164 cmp bl, DEVICE_8BIT_JRIDE_ISA 162 jne SHORT .ShlRegisterIndexInDX ; All XT-CF modes 163 ; Fall to .OutputALtoMemoryMappedRegisterInDX 164 165 .OutputALtoMemoryMappedRegisterInDX: 166 mov bx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET 165 jb SHORT .ShlRegisterIndexInDXandOutputAL ; All XT-CF modes 166 mov bx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET ; Zeroes BL 167 je SHORT .OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX 168 .ShlDXandMovHighByteOfADP50LoffsetsToBH: 169 eSHL_IM dx, 1 170 mov bh, ADP50L_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8 ; BL is zero so we only need to change BH 171 167 172 .OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX: 168 173 add bx, dx 169 174 push ds 170 mov ds, [di+DPT.wBasePort] ; Segment for JR-IDE/ISA 175 mov ds, [di+DPT.wBasePort] ; Segment for JR-IDE/ISA and ADP50L 171 176 mov [bx], al 172 177 pop ds … … 177 182 mov bx, dx 178 183 mov dl, [cs:bx+g_rgbSwapA0andA3fromIdeRegisterIndex] 179 SKIP2B bx ; Skip shldx, 1180 181 .ShlRegisterIndexInDX :184 SKIP2B bx ; Skip eSHL_IM dx, 1 185 186 .ShlRegisterIndexInDXandOutputAL: 182 187 eSHL_IM dx, 1 183 188 ; Fall to OutputALtoRegisterInDX … … 186 191 OutputALtoRegisterInDX: 187 192 add dx, [di+DPT.wBasePort] 188 OutputALtoPortInDX:189 193 out dx, al 190 194 ret
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