Changeset 473 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Main.asm


Ignore:
Timestamp:
Oct 10, 2012, 6:22:23 PM (13 years ago)
Author:
aitotat@…
google:author:
aitotat@gmail.com
Message:

Changes to XTIDE Universal BIOS:

  • Large changes to prepare full XT-CF support (DMA not yet implemented and memory mapped transfers are not working).
File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/XTIDE_Universal_BIOS/Src/Main.asm

    r471 r473  
    8888    at  ROMVARS.bIdleTimeout,   db  0                       ; Standby timer disabled by default
    8989
    90     at  ROMVARS.ideVars0+IDEVARS.wPort,         dw  DEVICE_ATA_PRIMARY_PORT         ; Controller Command Block base port
    91     at  ROMVARS.ideVars0+IDEVARS.wPortCtrl,     dw  DEVICE_ATA_PRIMARY_PORTCTRL     ; Controller Control Block base port
    92     at  ROMVARS.ideVars0+IDEVARS.bDevice,       db  DEVICE_16BIT_ATA
    93     at  ROMVARS.ideVars0+IDEVARS.bIRQ,          db  0
     90    at  ROMVARS.ideVars0+IDEVARS.wBasePort,         dw  DEVICE_ATA_PRIMARY_PORT         ; Controller Command Block base port
     91    at  ROMVARS.ideVars0+IDEVARS.wControlBlockPort, dw  DEVICE_ATA_PRIMARY_PORTCTRL     ; Controller Control Block base port
     92    at  ROMVARS.ideVars0+IDEVARS.bDevice,           db  DEVICE_16BIT_ATA
     93    at  ROMVARS.ideVars0+IDEVARS.bIRQ,              db  0
    9494    at  ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  dw  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    9595    at  ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   dw  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    9696
    97     at  ROMVARS.ideVars1+IDEVARS.wPort,         dw  DEVICE_ATA_SECONDARY_PORT
    98     at  ROMVARS.ideVars1+IDEVARS.wPortCtrl,     dw  DEVICE_ATA_SECONDARY_PORTCTRL
    99     at  ROMVARS.ideVars1+IDEVARS.bDevice,       db  DEVICE_16BIT_ATA
    100     at  ROMVARS.ideVars1+IDEVARS.bIRQ,          db  0
     97    at  ROMVARS.ideVars1+IDEVARS.bXTCFcontrolRegister,  db  0
     98    at  ROMVARS.ideVars1+IDEVARS.bDevice,               db  DEVICE_8BIT_XTCF_PIO8
     99    ;at ROMVARS.ideVars1+IDEVARS.wBasePort,     dw  DEVICE_ATA_SECONDARY_PORT
     100    ;at ROMVARS.ideVars1+IDEVARS.wControlBlockPort,     dw  DEVICE_ATA_SECONDARY_PORTCTRL
     101    ;at ROMVARS.ideVars1+IDEVARS.bDevice,       db  DEVICE_16BIT_ATA
     102    ;at ROMVARS.ideVars1+IDEVARS.bIRQ,          db  0
    101103    at  ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  dw  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    102104    at  ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   dw  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    103105
    104     at  ROMVARS.ideVars2+IDEVARS.wPort,         dw  DEVICE_ATA_TERTIARY_PORT
    105     at  ROMVARS.ideVars2+IDEVARS.wPortCtrl,     dw  DEVICE_ATA_TERTIARY_PORTCTRL
    106     at  ROMVARS.ideVars2+IDEVARS.bDevice,       db  DEVICE_16BIT_ATA
    107     at  ROMVARS.ideVars2+IDEVARS.bIRQ,          db  0
     106    at  ROMVARS.ideVars2+IDEVARS.wBasePort,         dw  DEVICE_ATA_TERTIARY_PORT
     107    at  ROMVARS.ideVars2+IDEVARS.wControlBlockPort, dw  DEVICE_ATA_TERTIARY_PORTCTRL
     108    at  ROMVARS.ideVars2+IDEVARS.bDevice,           db  DEVICE_16BIT_ATA
     109    at  ROMVARS.ideVars2+IDEVARS.bIRQ,              db  0
    108110    at  ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  dw  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    109111    at  ROMVARS.ideVars2+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   dw  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    110112
    111     at  ROMVARS.ideVars3+IDEVARS.wPort,         dw  DEVICE_ATA_QUATERNARY_PORT
    112     at  ROMVARS.ideVars3+IDEVARS.wPortCtrl,     dw  DEVICE_ATA_QUATERNARY_PORTCTRL
    113     at  ROMVARS.ideVars3+IDEVARS.bDevice,       db  DEVICE_16BIT_ATA
    114     at  ROMVARS.ideVars3+IDEVARS.bIRQ,          db  0
     113    at  ROMVARS.ideVars3+IDEVARS.wBasePort,         dw  DEVICE_ATA_QUATERNARY_PORT
     114    at  ROMVARS.ideVars3+IDEVARS.wControlBlockPort, dw  DEVICE_ATA_QUATERNARY_PORTCTRL
     115    at  ROMVARS.ideVars3+IDEVARS.bDevice,           db  DEVICE_16BIT_ATA
     116    at  ROMVARS.ideVars3+IDEVARS.bIRQ,              db  0
    115117    at  ROMVARS.ideVars3+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  dw  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    116118    at  ROMVARS.ideVars3+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   dw  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    … …  
    128130        at  ROMVARS.wBootTimeout,   dw  BOOT_MENU_DEFAULT_TIMEOUT
    129131%endif
    130     at  ROMVARS.bIdeCnt,        db  1                       ; Number of supported controllers
     132    at  ROMVARS.bIdeCnt,        db  2                       ; Number of supported controllers
    131133    at  ROMVARS.bBootDrv,       db  80h                     ; Boot Menu default drive
    132134    at  ROMVARS.bMinFddCnt,     db  0                       ; Do not force minimum number of floppy drives
    … …  
    134136    at  ROMVARS.bIdleTimeout,   db  0                       ; Standby timer disabled by default
    135137
    136     at  ROMVARS.ideVars0+IDEVARS.wPort,         dw  DEVICE_XTIDE_DEFAULT_PORT           ; Controller Command Block base port
    137     at  ROMVARS.ideVars0+IDEVARS.wPortCtrl,     dw  DEVICE_XTIDE_DEFAULT_PORTCTRL       ; Controller Control Block base port
    138     at  ROMVARS.ideVars0+IDEVARS.bDevice,       db  DEVICE_8BIT_XTIDE_REV1
     138    at  ROMVARS.ideVars0+IDEVARS.wBasePort,         dw  DEVICE_XTIDE_DEFAULT_PORT           ; Controller Command Block base port
     139    at  ROMVARS.ideVars0+IDEVARS.wControlBlockPort, dw  DEVICE_XTIDE_DEFAULT_PORTCTRL       ; Controller Control Block base port
     140    at  ROMVARS.ideVars0+IDEVARS.bDevice,           db  DEVICE_8BIT_XTIDE_REV1
    139141    at  ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    140142    at  ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    141143
     144    at  ROMVARS.ideVars1+IDEVARS.bXTCFcontrolRegister,  db  0
     145    at  ROMVARS.ideVars1+IDEVARS.bDevice,               db  DEVICE_8BIT_XTCF_PIO8
    142146    at  ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    143147    at  ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    … …  
    223227%endif
    224228    %include "IdeCommand.asm"
    225 %ifdef MODULE_JRIDE
     229%ifdef MODULE_8BIT_IDE
    226230    %include "JrIdeTransfer.asm"    ; Must be included after IdeCommand.asm
    227231%endif
    228232    %include "IdeTransfer.asm"
     233    %include "IdePioBlock.asm"
    229234    %include "IdeWait.asm"
    230235    %include "IdeError.asm"         ; Must be included after IdeWait.asm
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