[41] | 1 | ; Project name : Emulation library |
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[293] | 2 | ; Description : Macros for emulating later x86 instructions with older |
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[41] | 3 | ; processors. |
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[293] | 4 | ; Macros are used so optimized builds can be done |
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[41] | 5 | ; easily for different processors. |
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| 6 | ; |
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| 7 | ; This file must be first to be included to |
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| 8 | ; any source file. |
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| 9 | %ifndef EMULATE_INC |
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| 10 | %define EMULATE_INC |
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| 11 | |
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[293] | 12 | ; Defines for processor support (should be set in makefile). |
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| 13 | ; Unsupported instructions will be emulated using macros. |
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[41] | 14 | ; If AT class PC is used (instead of XT), define USE_AT |
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[293] | 15 | |
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[41] | 16 | ;%define USE_186 ; Define to use 18x/V20/V30 instructions |
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| 17 | ;%define USE_286 ; Define to use 286 instructions |
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| 18 | ;%define USE_386 ; Define to use 386 instructions |
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| 19 | ;%define USE_AT ; Define for AT class machine |
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| 20 | |
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[293] | 21 | %ifdef USE_386 |
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| 22 | %define USE_286 ; Define to use 286 instructions |
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| 23 | %endif |
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| 24 | %ifdef USE_286 |
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| 25 | %define USE_186 ; Define to use 18x/V20/V30 instructions |
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[510] | 26 | %define USE_UNDOC_INTEL ; Not supported by NEC V20/V30 |
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[293] | 27 | %endif |
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| 28 | |
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| 29 | %ifdef USE_386 |
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| 30 | CPU 386 ; Allow instructions up to 386 |
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[41] | 31 | %elifdef USE_286 |
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[293] | 32 | CPU 286 ; Allow instructions up to 286 |
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| 33 | %elifdef USE_186 |
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| 34 | CPU 186 ; Allow instructions up to 188/186/V20/V30 |
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| 35 | %else |
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| 36 | CPU 8086 ; Allow 8088/8086 instructions only |
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[41] | 37 | %endif |
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[293] | 38 | |
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[41] | 39 | BITS 16 ; Set 16 bit code generation |
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| 40 | |
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| 41 | ; Alignments for jump targets. |
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| 42 | ; Following values are optimal for different processor types: |
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| 43 | ; 286 and 386SX WORD (16-bit, 2 bytes) |
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| 44 | ; 386DX and 486 DWORD (32-bit, 4 bytes) |
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| 45 | ; Pentium and later QWORD (64-bit, 8 bytes) |
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| 46 | %ifdef USE_AT |
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| 47 | %ifdef USE_386 |
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| 48 | JUMP_ALIGN EQU 4 |
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| 49 | WORD_ALIGN EQU 2 |
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| 50 | %else ; USE_286 |
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| 51 | JUMP_ALIGN EQU 2 |
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| 52 | WORD_ALIGN EQU 2 |
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| 53 | %endif |
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| 54 | %else ; XT |
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| 55 | JUMP_ALIGN EQU 1 |
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| 56 | WORD_ALIGN EQU 1 |
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| 57 | %endif |
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| 58 | |
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| 59 | ;========================================================================== |
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| 60 | |
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| 61 | ;-------------------------------------------------------------------- |
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[491] | 62 | ; The undocumented instruction SALC (Set AL According to CF). |
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| 63 | ; Available on all Intel processors and truly compatible clones. |
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| 64 | ; Does not work on the NEC V20/V30 or Sony CXQ70108 processors. |
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| 65 | ; |
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| 66 | ; eSALC |
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| 67 | ; Parameters: |
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| 68 | ; Nothing |
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| 69 | ; Returns: |
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| 70 | ; AL: FFh if CF=1 |
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| 71 | ; 00h if CF=0 |
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| 72 | ; Corrupts registers: |
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| 73 | ; Nothing |
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| 74 | ;-------------------------------------------------------------------- |
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| 75 | %macro eSALC 0 |
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| 76 | db 0D6h |
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| 77 | %endmacro |
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| 78 | |
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| 79 | |
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| 80 | ;-------------------------------------------------------------------- |
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| 81 | ; The AAD instruction (ASCII Adjust before Division). |
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| 82 | ; Available on all Intel processors and truly compatible clones. |
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| 83 | ; Does not work on the NEC V20/V30 or Sony CXQ70108 processors |
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| 84 | ; unless %1 is 10 (0Ah). |
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| 85 | ; |
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| 86 | ; eAAD |
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| 87 | ; Parameters: |
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| 88 | ; %1: Any 8 bit number (0...255) |
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| 89 | ; Returns: |
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| 90 | ; AL: AH * %1 + AL |
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| 91 | ; AH: 0 |
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| 92 | ; Flags: Set according to result |
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| 93 | ; Corrupts registers: |
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| 94 | ; Nothing |
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| 95 | ;-------------------------------------------------------------------- |
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| 96 | %macro eAAD 1 |
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| 97 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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| 98 | %if %1 > 255 |
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| 99 | %error Invalid parameter passed to eAAD (%1 > 255) |
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| 100 | %else |
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| 101 | db 0D5h, %1 |
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| 102 | %endif |
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| 103 | %endif |
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| 104 | %endmacro |
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| 105 | |
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| 106 | |
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| 107 | ;-------------------------------------------------------------------- |
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| 108 | ; The AAM instruction (ASCII Adjust after Multiplication). |
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| 109 | ; Available on all Intel processors and truly compatible clones. |
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| 110 | ; Does not work on the NEC V20/V30 or Sony CXQ70108 processors |
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| 111 | ; unless %1 is 10 (0Ah). |
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| 112 | ; |
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| 113 | ; eAAM |
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| 114 | ; Parameters: |
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| 115 | ; %1: Any 8 bit number except 0 (1...255) |
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| 116 | ; Returns: |
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| 117 | ; AL: AL MOD %1 |
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| 118 | ; AH: AL / %1 |
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| 119 | ; Flags: Set according to result |
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| 120 | ; Corrupts registers: |
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| 121 | ; Nothing |
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| 122 | ;-------------------------------------------------------------------- |
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| 123 | %macro eAAM 1 |
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| 124 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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| 125 | %if %1 > 255 |
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| 126 | %error Invalid parameter passed to eAAM (%1 > 255) |
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| 127 | %elif %1 = 0 |
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| 128 | %error Invalid parameter passed to eAAM (%1 = 0). This would cause a divide-by-zero exception! |
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| 129 | %else |
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| 130 | db 0D4h, %1 |
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| 131 | %endif |
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| 132 | %endif |
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| 133 | %endmacro |
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| 134 | |
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| 135 | |
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| 136 | ;-------------------------------------------------------------------- |
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[41] | 137 | ; Emulates BSF (Bit Scan Forward) instruction when necessary. |
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| 138 | ; BSF is used to find index of least significant bit. |
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| 139 | ; |
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| 140 | ; eBSF |
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| 141 | ; Parameters: |
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| 142 | ; %1: Destination WORD Register for bit index (not CX or same as %2!) |
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| 143 | ; %2: Source WORD operand where to search bit (not CX or same as %1!) |
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| 144 | ; Returns: |
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| 145 | ; %1: Index of highest order bit from %2 |
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| 146 | ; ZF: Set if %2 is zero |
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| 147 | ; Cleared if %2 is non-zero |
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| 148 | ; Corrupts registers: |
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| 149 | ; Nothing |
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| 150 | ;-------------------------------------------------------------------- |
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| 151 | %macro eBSF 2 |
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| 152 | %ifndef USE_386 |
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| 153 | push cx |
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| 154 | cmp WORD %2, BYTE 0 ; Source operand is zero? |
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| 155 | je SHORT %%Return ; If so, return with ZF set |
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| 156 | |
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| 157 | ; Set destination to zero and load mask for bit 0 |
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| 158 | xor %1, %1 |
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| 159 | mov cx, 1 |
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| 160 | |
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| 161 | ALIGN JUMP_ALIGN |
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| 162 | %%BitLoop: |
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| 163 | test %2, cx ; Bit set? |
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| 164 | jnz SHORT %%Return ; If so, return with ZF cleared |
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| 165 | shl cx, 1 ; Prepare to test next bit |
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| 166 | inc %1 ; Increment bit index |
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| 167 | jmp SHORT %%BitLoop ; Loop until bit found |
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| 168 | %%Return: |
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| 169 | pop cx |
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| 170 | ;----------------------------------- |
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| 171 | %else |
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| 172 | bsf %1, %2 |
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| 173 | %endif |
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| 174 | %endmacro |
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| 175 | |
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| 176 | |
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| 177 | ;-------------------------------------------------------------------- |
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| 178 | ; Emulates BSR (Bit Scan Reverse) instruction when necessary. |
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| 179 | ; BSR is used to find index of most significant bit. |
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| 180 | ; |
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| 181 | ; eBSR |
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| 182 | ; Parameters: |
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| 183 | ; %1: Destination WORD Register for bit index (not CX or same as %2!) |
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| 184 | ; %2: Source WORD operand where to search bit (not CX or same as %1!) |
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| 185 | ; Returns: |
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| 186 | ; %1: Index of highest order bit from %2 |
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| 187 | ; ZF: Set if %2 is zero |
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| 188 | ; Cleared if %2 is non-zero |
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| 189 | ; Corrupts registers: |
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| 190 | ; Nothing |
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| 191 | ;-------------------------------------------------------------------- |
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| 192 | %macro eBSR 2 |
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| 193 | %ifndef USE_386 |
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| 194 | push cx |
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| 195 | cmp WORD %2, BYTE 0 ; Source operand is zero? |
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| 196 | je SHORT %%Return ; If so, return with ZF set |
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| 197 | |
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| 198 | ; Load mask for highest order bit |
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| 199 | mov cx, 1<<15 |
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| 200 | mov %1, 15 |
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| 201 | |
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| 202 | ALIGN JUMP_ALIGN |
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| 203 | %%BitLoop: |
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| 204 | test %2, cx ; Bit set? |
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| 205 | jnz SHORT %%Return ; If so, return with ZF cleared |
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| 206 | shr cx, 1 ; Prepare to test next bit |
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| 207 | dec %1 ; Decrement bit index |
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| 208 | jmp SHORT %%BitLoop ; Loop until bit found |
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| 209 | %%Return: |
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| 210 | pop cx |
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| 211 | ;----------------------------------- |
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| 212 | %else |
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| 213 | bsr %1, %2 |
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| 214 | %endif |
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| 215 | %endmacro |
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| 216 | |
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| 217 | |
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| 218 | ;-------------------------------------------------------------------- |
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| 219 | ; Conditional Move. |
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| 220 | ; |
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| 221 | ; eCMOVcc |
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| 222 | ; Parameters: |
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| 223 | ; %1: Destination data |
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| 224 | ; %2: Source data |
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| 225 | ; Returns: |
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| 226 | ; Nothing |
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| 227 | ; Corrupts registers: |
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| 228 | ; Nothing |
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| 229 | ;-------------------------------------------------------------------- |
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[146] | 230 | %macro eCMOVA 2 |
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| 231 | jbe SHORT %%Return |
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| 232 | mov %1, %2 |
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| 233 | %%Return: |
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| 234 | %endmacro |
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| 235 | |
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[41] | 236 | %macro eCMOVC 2 |
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| 237 | jnc SHORT %%Return |
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| 238 | mov %1, %2 |
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| 239 | %%Return: |
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| 240 | %endmacro |
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| 241 | |
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[390] | 242 | %macro eCMOVNC 2 |
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| 243 | jc SHORT %%Return |
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| 244 | mov %1, %2 |
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| 245 | %%Return: |
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| 246 | %endmacro |
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| 247 | |
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[64] | 248 | %macro eCMOVZ 2 |
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| 249 | jnz SHORT %%Return |
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| 250 | mov %1, %2 |
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| 251 | %%Return: |
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| 252 | %endmacro |
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| 253 | |
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[94] | 254 | %macro eCMOVNZ 2 |
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| 255 | jz SHORT %%Return |
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[41] | 256 | mov %1, %2 |
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| 257 | %%Return: |
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| 258 | %endmacro |
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| 259 | |
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[94] | 260 | %macro eCMOVE 2 |
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| 261 | eCMOVZ %1, %2 |
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| 262 | %endmacro |
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| 263 | |
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| 264 | %macro eCMOVNE 2 |
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| 265 | eCMOVNZ %1, %2 |
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| 266 | %endmacro |
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| 267 | |
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[60] | 268 | %macro eCMOVB 2 |
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| 269 | jnb SHORT %%Return |
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| 270 | mov %1, %2 |
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| 271 | %%Return: |
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| 272 | %endmacro |
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[41] | 273 | |
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[390] | 274 | %macro eCMOVS 2 |
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| 275 | jns SHORT %%Return |
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| 276 | mov %1, %2 |
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| 277 | %%Return: |
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| 278 | %endmacro |
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[41] | 279 | |
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[396] | 280 | %macro eCMOVNS 2 |
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| 281 | js SHORT %%Return |
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| 282 | mov %1, %2 |
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| 283 | %%Return: |
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| 284 | %endmacro |
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[390] | 285 | |
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[396] | 286 | |
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[168] | 287 | ;-------------------------------------------------------------------- |
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| 288 | ; Conditional Set. |
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| 289 | ; |
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| 290 | ; eCSETcc |
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| 291 | ; Parameters: |
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| 292 | ; %1: Destination data |
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| 293 | ; Returns: |
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| 294 | ; Nothing |
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| 295 | ; Corrupts registers: |
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| 296 | ; Flags |
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| 297 | ;-------------------------------------------------------------------- |
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| 298 | %macro eCSETZ 1 |
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| 299 | mov %1, 0 ; Clear while preserving flags |
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| 300 | jnz SHORT %%Return ; Nothing to set |
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| 301 | inc %1 |
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| 302 | %%Return: |
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| 303 | %endmacro |
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[60] | 304 | |
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[168] | 305 | |
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[41] | 306 | ;-------------------------------------------------------------------- |
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| 307 | ; Moves byte with zero-extending to any Register. |
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| 308 | ; |
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| 309 | ; eMOVZX |
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| 310 | ; Parameters: |
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| 311 | ; %1: Destination Register (SP not supported) |
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| 312 | ; %2: Byte register or byte address |
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| 313 | ; Returns: |
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| 314 | ; Nothing |
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| 315 | ; Corrupts registers: |
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| 316 | ; FLAGS |
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| 317 | ;-------------------------------------------------------------------- |
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| 318 | %macro eMOVZX 2 |
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| 319 | %ifndef USE_386 |
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| 320 | %ifidni %1, ax |
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| 321 | mov al, %2 |
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| 322 | xor ah, ah |
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| 323 | %elifidni %1, bx |
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| 324 | mov bl, %2 |
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| 325 | xor bh, bh ; %2 may use BX in effective address |
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| 326 | %elifidni %1, cx |
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| 327 | mov cl, %2 |
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| 328 | xor ch, ch |
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| 329 | %elifidni %1, dx |
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| 330 | mov dl, %2 |
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| 331 | xor dh, dh |
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| 332 | %else ; SI, DI, BP (all may be used in effective address) |
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| 333 | push ax |
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| 334 | mov al, %2 |
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| 335 | xor ah, ah |
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| 336 | xchg ax, %1 |
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| 337 | pop ax |
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| 338 | %endif |
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| 339 | ;----------------------------------- |
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| 340 | %else |
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| 341 | movzx %1, %2 |
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| 342 | %endif |
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| 343 | %endmacro |
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| 344 | |
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| 345 | |
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| 346 | ;-------------------------------------------------------------------- |
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| 347 | ; Emulates PUSHA instruction when necessary. |
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| 348 | ; |
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| 349 | ; ePUSHA |
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| 350 | ; Parameters: |
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| 351 | ; Nothing |
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| 352 | ; Returns: |
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| 353 | ; Nothing |
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| 354 | ; Corrupts registers: |
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| 355 | ; Nothing |
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| 356 | ;-------------------------------------------------------------------- |
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| 357 | %macro ePUSHA 0 |
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| 358 | %ifndef USE_186 |
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| 359 | push ax |
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| 360 | push cx |
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| 361 | push dx |
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| 362 | push bx |
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[113] | 363 | push sp |
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[41] | 364 | push bp |
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| 365 | push si |
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| 366 | push di |
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| 367 | ;----------------------------------- |
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| 368 | %else |
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| 369 | pusha |
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| 370 | %endif |
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| 371 | %endmacro |
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| 372 | |
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| 373 | |
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| 374 | ;-------------------------------------------------------------------- |
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| 375 | ; Emulates POPA instruction when necessary. |
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| 376 | ; |
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| 377 | ; ePOPA |
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| 378 | ; Parameters: |
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| 379 | ; Nothing |
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| 380 | ; Returns: |
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| 381 | ; Nothing |
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| 382 | ; Corrupts registers: |
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| 383 | ; Nothing |
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| 384 | ;-------------------------------------------------------------------- |
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| 385 | %macro ePOPA 0 |
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| 386 | %ifndef USE_186 |
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| 387 | pop di |
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| 388 | pop si |
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| 389 | pop bp |
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[113] | 390 | pop ax ; Skip SP |
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[41] | 391 | pop bx |
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| 392 | pop dx |
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| 393 | pop cx |
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| 394 | pop ax |
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| 395 | ;----------------------------------- |
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| 396 | %else |
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| 397 | popa |
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| 398 | %endif |
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| 399 | %endmacro |
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| 400 | |
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| 401 | |
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| 402 | ;-------------------------------------------------------------------- |
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| 403 | ; Emulates ENTER instruction when necessary. |
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| 404 | ; |
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| 405 | ; eENTER |
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| 406 | ; Parameters: |
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| 407 | ; %1: Number of bytes to reserve from stack |
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| 408 | ; %2: The lexical nesting level (not emulated, set to 0) |
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| 409 | ; Returns: |
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| 410 | ; SS:BP: Ptr to old BP |
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| 411 | ; ([bp-2] points to highest local stack frame word) |
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| 412 | ; Corrupts registers: |
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| 413 | ; FLAGS |
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| 414 | ;-------------------------------------------------------------------- |
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| 415 | %macro eENTER 2 |
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| 416 | %ifndef USE_186 |
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| 417 | push bp |
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| 418 | mov bp, sp |
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| 419 | sub sp, %1 |
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| 420 | ;----------------------------------- |
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| 421 | %else |
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| 422 | enter %1, %2 |
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| 423 | %endif |
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| 424 | %endmacro |
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| 425 | |
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| 426 | ;-------------------------------------------------------------------- |
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| 427 | ; Emulates LEAVE instruction when necessary. |
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| 428 | ; |
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| 429 | ; eLEAVE |
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| 430 | ; Parameters: |
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| 431 | ; Nothing |
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| 432 | ; Returns: |
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| 433 | ; BP: What it was before eENTER |
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| 434 | ; Corrupts registers: |
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| 435 | ; Nothing |
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| 436 | ;-------------------------------------------------------------------- |
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| 437 | %macro eLEAVE 0 |
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| 438 | %ifndef USE_186 |
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| 439 | mov sp, bp |
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| 440 | pop bp |
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| 441 | ;----------------------------------- |
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| 442 | %else |
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| 443 | leave |
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| 444 | %endif |
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| 445 | %endmacro |
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| 446 | |
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| 447 | |
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| 448 | ;-------------------------------------------------------------------- |
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| 449 | ; Emulates LSS instruction when necessary. |
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| 450 | ; |
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| 451 | ; eLSS |
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| 452 | ; Parameters: |
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| 453 | ; %1: Destination register |
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| 454 | ; %2: Source memory address without brackets |
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| 455 | ; Returns: |
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| 456 | ; IF: 0 (interrupts disabled) |
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| 457 | ; Corrupts registers: |
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| 458 | ; Nothing |
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| 459 | ;-------------------------------------------------------------------- |
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| 460 | %macro eLSS 2 |
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| 461 | %ifndef USE_386 |
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| 462 | cli ; Disable interrupts |
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| 463 | mov %1, [%2] ; Load offset |
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| 464 | mov ss, [%2+2] ; Load segment |
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| 465 | ;----------------------------------- |
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| 466 | %else |
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| 467 | lss %1, [%2] |
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| 468 | %endif |
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| 469 | %endmacro |
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| 470 | |
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| 471 | |
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| 472 | ;-------------------------------------------------------------------- |
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| 473 | ; Repeats string instruction with segment override. |
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| 474 | ; This macro prevents 8088/8086 restart bug. |
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| 475 | ; |
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| 476 | ; eSEG_STR |
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| 477 | ; Parameters: |
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| 478 | ; %1: REP/REPNE or REPE prefix |
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| 479 | ; %2: Source segment override (destination is always ES) |
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| 480 | ; %3: String instruction |
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| 481 | ; CX: Repeat count |
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| 482 | ; Returns: |
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| 483 | ; FLAGS for cmps and scas only |
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| 484 | ; Corrupts registers: |
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| 485 | ; Nothing |
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| 486 | ;-------------------------------------------------------------------- |
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| 487 | %macro eSEG_STR 3 |
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| 488 | %ifndef USE_186 ; 8088/8086 has string instruction restart bug when more than one prefix |
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[223] | 489 | %%Loop: |
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| 490 | %1 ; REP is the prefix that can be lost |
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| 491 | %2 ; SEG is the prefix that won't be lost |
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| 492 | %3 ; String instruction |
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| 493 | jcxz %%End ; Jump to end if no repeats left (preserves FLAGS) |
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| 494 | jmp SHORT %%Loop ; Loop while repeats left |
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| 495 | %%End: |
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[41] | 496 | %else ; No bug on V20/V30 and later, don't know about 188/186 |
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[223] | 497 | %2 |
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| 498 | %1 %3 |
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[41] | 499 | %endif |
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| 500 | %endmacro |
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| 501 | |
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| 502 | |
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| 503 | ;-------------------------------------------------------------------- |
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| 504 | ; Bit shifts and rotates with immediate. |
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| 505 | ; |
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| 506 | ; eSHIFT_IM |
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| 507 | ; Parameters: |
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| 508 | ; %1: Shift target |
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| 509 | ; %2: Number of bits to shift |
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| 510 | ; %3: Instruction (SHL, SHR, ROL, ROR, RCL, RCR) |
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| 511 | ; Returns: |
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| 512 | ; FLAGS |
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| 513 | ; Corrupts registers: |
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| 514 | ; Nothing |
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| 515 | ;-------------------------------------------------------------------- |
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| 516 | %macro eSHIFT_IM 3 |
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[488] | 517 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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[41] | 518 | %ifndef USE_186 |
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| 519 | %ifidni %1, cl |
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| 520 | times %2 %3 %1, 1 |
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| 521 | %elifidni %1, ch |
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| 522 | times %2 %3 %1, 1 |
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| 523 | %elifidni %1, cx |
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| 524 | times %2 %3 %1, 1 |
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| 525 | %else |
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[181] | 526 | %if %2 > 3 ; Size optimized value |
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[41] | 527 | push cx |
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| 528 | mov cl, %2 |
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| 529 | %3 %1, cl |
---|
| 530 | pop cx |
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| 531 | %else |
---|
| 532 | times %2 %3 %1, 1 |
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| 533 | %endif |
---|
| 534 | %endif |
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| 535 | ;----------------------------------- |
---|
| 536 | %else |
---|
| 537 | %3 %1, %2 |
---|
| 538 | %endif |
---|
[488] | 539 | %endif |
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[41] | 540 | %endmacro |
---|
[420] | 541 | |
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[41] | 542 | %macro eSHR_IM 2 |
---|
| 543 | eSHIFT_IM %1, %2, shr |
---|
| 544 | %endmacro |
---|
[445] | 545 | |
---|
[41] | 546 | %macro eSHL_IM 2 |
---|
[489] | 547 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
---|
[445] | 548 | %ifdef USE_386 |
---|
| 549 | %if %2 = 1 |
---|
| 550 | add %1, %1 ; Same size but faster on 386 and 486. Fails if %1 is a memory operand. |
---|
| 551 | %else |
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| 552 | eSHIFT_IM %1, %2, shl |
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| 553 | %endif |
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| 554 | %else |
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[41] | 555 | eSHIFT_IM %1, %2, shl |
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[445] | 556 | %endif |
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[489] | 557 | %endif |
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[41] | 558 | %endmacro |
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[445] | 559 | |
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[41] | 560 | %macro eROR_IM 2 |
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| 561 | eSHIFT_IM %1, %2, ror |
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| 562 | %endmacro |
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[445] | 563 | |
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[41] | 564 | %macro eROL_IM 2 |
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| 565 | eSHIFT_IM %1, %2, rol |
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| 566 | %endmacro |
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[445] | 567 | |
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[41] | 568 | %macro eRCR_IM 2 |
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| 569 | eSHIFT_IM %1, %2, rcr |
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| 570 | %endmacro |
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[445] | 571 | |
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[41] | 572 | %macro eRCL_IM 2 |
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| 573 | eSHIFT_IM %1, %2, rcl |
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| 574 | %endmacro |
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| 575 | |
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| 576 | |
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| 577 | ;-------------------------------------------------------------------- |
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| 578 | ; Emulates PUSH imm instruction when necessary. |
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| 579 | ; |
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| 580 | ; ePUSH_I |
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| 581 | ; Parameters: |
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| 582 | ; %1: Immediate to push |
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| 583 | ; Returns: |
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| 584 | ; Nothing |
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| 585 | ; Corrupts registers: |
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| 586 | ; Nothing |
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| 587 | ;-------------------------------------------------------------------- |
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| 588 | %macro ePUSH_I 1 |
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| 589 | %ifndef USE_186 |
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| 590 | push bp ; Immediate goes here |
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| 591 | push bp |
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| 592 | mov bp, sp |
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| 593 | mov WORD [bp+2], %1 |
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| 594 | pop bp |
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| 595 | ;----------------------------------- |
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| 596 | %else |
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| 597 | push %1 |
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| 598 | %endif |
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| 599 | %endmacro |
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| 600 | |
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| 601 | |
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| 602 | ;-------------------------------------------------------------------- |
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| 603 | ; Emulates PUSH imm instruction when necessary. |
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| 604 | ; ePUSH_T uses temporary register for faster performance |
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| 605 | ; and smaller code size than ePUSH_I. |
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| 606 | ; |
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| 607 | ; ePUSH_T |
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| 608 | ; Parameters: |
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| 609 | ; %1: Temporary Register |
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| 610 | ; %2: Immediate to push |
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| 611 | ; Returns: |
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| 612 | ; Nothing |
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| 613 | ; Corrupts registers: |
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| 614 | ; %1 |
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| 615 | ;-------------------------------------------------------------------- |
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| 616 | %macro ePUSH_T 2 |
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| 617 | %ifndef USE_186 |
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| 618 | %ifidni %2, 0 |
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| 619 | xor %1, %1 |
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| 620 | %else |
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| 621 | mov %1, %2 |
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| 622 | %endif |
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| 623 | push %1 |
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| 624 | ;----------------------------------- |
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| 625 | %else |
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| 626 | push %2 |
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| 627 | %endif |
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| 628 | %endmacro |
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| 629 | |
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| 630 | |
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| 631 | %endif ; EMULATE_INC |
---|