1 | ; Project name : Emulation library |
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2 | ; Description : Macros for emulating later x86 instructions with older |
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3 | ; processors. |
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4 | ; Macros are used so optimized builds can be done |
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5 | ; easily for different processors. |
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6 | ; |
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7 | ; This file must be first to be included to |
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8 | ; any source file. |
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9 | %ifndef EMULATE_INC |
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10 | %define EMULATE_INC |
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11 | |
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12 | ; Defines for processor support (should be set in makefile). |
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13 | ; Unsupported instructions will be emulated using macros. |
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14 | ; If AT class PC is used (instead of XT), define USE_AT |
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15 | |
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16 | ;%define USE_186 ; Define to use 18x/V20/V30 instructions |
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17 | ;%define USE_286 ; Define to use 286 instructions |
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18 | ;%define USE_386 ; Define to use 386 instructions |
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19 | ;%define USE_AT ; Define for AT class machine |
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20 | |
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21 | %ifdef USE_NEC_V ; This will run on NEC V20/V30 processors only |
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22 | %define USE_186 ; Define to use 18x/V20/V30 instructions |
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23 | %ifdef USE_UNDOC_INTEL OR USE_286 OR USE_386 |
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24 | %fatal "Conflicting processor define used together with USE_NEC_V!" |
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25 | %endif |
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26 | %endif |
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27 | |
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28 | %ifdef USE_386 |
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29 | %define USE_286 ; Define to use 286 instructions |
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30 | %endif |
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31 | %ifdef USE_286 |
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32 | %define USE_186 ; Define to use 18x/V20/V30 instructions |
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33 | %define USE_UNDOC_INTEL ; Not supported by NEC V20/V30 |
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34 | %endif |
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35 | |
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36 | %ifdef USE_386 |
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37 | CPU 386 ; Allow instructions up to 386 |
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38 | %elifdef USE_286 |
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39 | CPU 286 ; Allow instructions up to 286 |
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40 | %elifdef USE_186 |
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41 | CPU 186 ; Allow instructions up to 188/186/V20/V30 |
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42 | %else |
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43 | CPU 8086 ; Allow 8088/8086 instructions only |
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44 | %endif |
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45 | |
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46 | BITS 16 ; Set 16 bit code generation |
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47 | |
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48 | ; Alignments for jump targets. |
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49 | ; Following values are optimal for different processor types: |
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50 | ; 286 and 386SX WORD (16-bit, 2 bytes) |
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51 | ; 386DX and 486 DWORD (32-bit, 4 bytes) |
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52 | ; Pentium and later QWORD (64-bit, 8 bytes) |
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53 | %ifdef USE_AT |
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54 | %ifdef USE_386 |
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55 | JUMP_ALIGN EQU 4 |
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56 | WORD_ALIGN EQU 2 |
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57 | %else ; USE_286 |
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58 | JUMP_ALIGN EQU 2 |
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59 | WORD_ALIGN EQU 2 |
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60 | %endif |
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61 | %else ; XT |
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62 | %ifndef USE_086 ; 8088/V20 CPUs |
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63 | JUMP_ALIGN EQU 1 ; 2 is optimal for 8086 and NEC V30 CPUs but it's not worth the ROM space for most XT machines with 8088 or NEC V20 CPUs. |
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64 | WORD_ALIGN EQU 2 ; The same applies here but the cost of ROM space is negligible. |
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65 | %else ; 8086/V30 CPUs |
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66 | JUMP_ALIGN EQU 2 |
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67 | WORD_ALIGN EQU 2 |
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68 | %endif |
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69 | %endif |
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70 | |
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71 | ;========================================================================== |
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72 | |
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73 | ;-------------------------------------------------------------------- |
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74 | ; Find String In String |
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75 | ; |
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76 | ; FSIS |
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77 | ; Parameters: |
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78 | ; %1: String to search for (case-insensitive) |
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79 | ; %2: String to search in |
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80 | ; Returns: |
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81 | ; strpos: Position of %1 in %2 if found, 0 if not found |
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82 | ;-------------------------------------------------------------------- |
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83 | %macro FSIS 2.nolist |
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84 | %defstr s1 %1 |
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85 | %defstr s2 %2 |
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86 | %strlen sl1 s1 |
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87 | %strlen sl2 s2 |
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88 | %assign strpos 0 |
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89 | %if sl1 <= sl2 |
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90 | %assign strpos sl2 - sl1 + 1 |
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91 | %rep strpos |
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92 | %substr %%ss s2 strpos, sl1 |
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93 | %ifidni %%ss, s1 |
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94 | %exitrep |
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95 | %else |
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96 | %assign strpos strpos - 1 |
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97 | %endif |
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98 | %endrep |
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99 | %endif |
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100 | %endmacro |
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101 | |
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102 | |
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103 | %ifdef USE_NEC_V |
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104 | %include "NEC_V.inc" |
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105 | %endif |
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106 | |
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107 | |
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108 | ;-------------------------------------------------------------------- |
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109 | ; The undocumented instruction SALC (Set AL According to CF). |
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110 | ; Available on all Intel processors and truly compatible clones. |
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111 | ; Does not work on the NEC V20/V30 or Sony CXQ70108 processors. |
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112 | ; |
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113 | ; eSALC |
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114 | ; Parameters: |
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115 | ; Nothing |
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116 | ; Returns: |
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117 | ; AL: FFh if CF=1 |
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118 | ; 00h if CF=0 |
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119 | ; Corrupts registers: |
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120 | ; Nothing |
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121 | ;-------------------------------------------------------------------- |
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122 | %macro eSALC 0 |
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123 | ; db 0D6h |
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124 | salc |
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125 | %endmacro |
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126 | |
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127 | |
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128 | ;-------------------------------------------------------------------- |
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129 | ; The AAD instruction (ASCII Adjust before Division). |
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130 | ; Available on all Intel processors and truly compatible clones. |
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131 | ; Does not work on the NEC V20/V30 or Sony CXQ70108 processors |
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132 | ; unless %1 is 10 (0Ah). |
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133 | ; |
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134 | ; eAAD |
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135 | ; Parameters: |
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136 | ; %1: Any 8 bit number (0...255) |
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137 | ; Returns: |
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138 | ; AL: AH * %1 + AL |
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139 | ; AH: 0 |
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140 | ; Flags: Set according to result |
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141 | ; Corrupts registers: |
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142 | ; Nothing |
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143 | ;-------------------------------------------------------------------- |
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144 | %macro eAAD 1 |
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145 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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146 | %if %1 > 255 |
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147 | %error Invalid parameter passed to eAAD (%1 > 255) |
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148 | %else |
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149 | db 0D5h, %1 |
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150 | %endif |
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151 | %endif |
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152 | %endmacro |
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153 | |
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154 | |
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155 | ;-------------------------------------------------------------------- |
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156 | ; The AAM instruction (ASCII Adjust after Multiplication). |
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157 | ; |
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158 | ; eAAM |
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159 | ; Parameters: |
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160 | ; %1: Any 8 bit number except 0 (1...255) |
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161 | ; Returns: |
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162 | ; AL: AL MOD %1 |
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163 | ; AH: AL / %1 |
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164 | ; Flags: Set according to result |
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165 | ; Corrupts registers: |
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166 | ; Nothing |
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167 | ;-------------------------------------------------------------------- |
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168 | %macro eAAM 1 |
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169 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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170 | %if %1 > 255 |
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171 | %error Invalid parameter passed to eAAM (%1 > 255) |
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172 | %elif %1 = 0 |
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173 | %error Invalid parameter passed to eAAM (%1 = 0). This would cause a divide-by-zero exception! |
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174 | %else |
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175 | db 0D4h, %1 |
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176 | %endif |
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177 | %endif |
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178 | %endmacro |
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179 | |
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180 | |
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181 | ;-------------------------------------------------------------------- |
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182 | ; Emulates BSF (Bit Scan Forward) instruction when necessary. |
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183 | ; BSF is used to find index of least significant bit. |
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184 | ; |
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185 | ; eBSF |
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186 | ; Parameters: |
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187 | ; %1: Destination WORD Register for bit index (not CX or same as %2!) |
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188 | ; %2: Source WORD operand where to search bit (not CX or same as %1!) |
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189 | ; Returns: |
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190 | ; %1: Index of lowest order bit from %2 |
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191 | ; ZF: Set if %2 is zero |
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192 | ; Cleared if %2 is non-zero |
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193 | ; Corrupts registers: |
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194 | ; Nothing |
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195 | ;-------------------------------------------------------------------- |
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196 | %macro eBSF 2 |
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197 | %ifndef USE_386 |
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198 | FSIS ], %2 ; %2 is a memory operand? |
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199 | %if strpos |
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200 | cmp WORD %2, BYTE 0 ; Source operand is zero? |
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201 | je SHORT %%Return ; If so, return with ZF set |
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202 | %else ; No, %2 is a register |
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203 | test %2, %2 |
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204 | jz SHORT %%Return |
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205 | %endif |
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206 | |
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207 | push cx |
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208 | |
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209 | %ifdef USE_NEC_V |
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210 | mov cx, -1 |
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211 | |
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212 | ALIGN JUMP_ALIGN |
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213 | %%BitLoop: |
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214 | inc cx |
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215 | eTEST1 %2, cl |
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216 | jz SHORT %%BitLoop |
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217 | mov %1, cx |
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218 | |
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219 | %else ; ~USE_NEC_V |
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220 | mov cx, 1<<15 |
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221 | mov %1, -1 |
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222 | |
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223 | ALIGN JUMP_ALIGN |
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224 | %%BitLoop: |
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225 | rol cx, 1 ; Prepare to test next bit |
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226 | inc %1 ; Increment bit index |
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227 | test %2, cx ; Bit set? |
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228 | jz SHORT %%BitLoop |
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229 | %endif |
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230 | |
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231 | pop cx |
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232 | |
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233 | %%Return: |
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234 | ;----------------------------------- |
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235 | %else ; USE_386 |
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236 | bsf %1, %2 |
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237 | %endif |
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238 | %endmacro |
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239 | |
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240 | |
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241 | ;-------------------------------------------------------------------- |
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242 | ; Emulates BSR (Bit Scan Reverse) instruction when necessary. |
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243 | ; BSR is used to find index of most significant bit. |
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244 | ; |
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245 | ; eBSR |
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246 | ; Parameters: |
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247 | ; %1: Destination WORD Register for bit index (not CX or same as %2!) |
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248 | ; %2: Source WORD operand where to search bit (not CX or same as %1!) |
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249 | ; Returns: |
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250 | ; %1: Index of highest order bit from %2 |
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251 | ; ZF: Set if %2 is zero |
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252 | ; Cleared if %2 is non-zero |
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253 | ; Corrupts registers: |
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254 | ; Nothing |
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255 | ;-------------------------------------------------------------------- |
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256 | %macro eBSR 2 |
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257 | %ifndef USE_386 |
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258 | FSIS ], %2 ; %2 is a memory operand? |
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259 | %if strpos |
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260 | cmp WORD %2, BYTE 0 ; Source operand is zero? |
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261 | je SHORT %%Return ; If so, return with ZF set |
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262 | %else ; No, %2 is a register |
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263 | test %2, %2 |
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264 | jz SHORT %%Return |
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265 | %endif |
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266 | |
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267 | push cx |
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268 | |
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269 | %ifdef USE_NEC_V |
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270 | mov cx, 16 |
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271 | |
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272 | ALIGN JUMP_ALIGN |
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273 | %%BitLoop: |
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274 | dec cx |
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275 | eTEST1 %2, cl |
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276 | jz SHORT %%BitLoop |
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277 | mov %1, cx |
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278 | |
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279 | %else ; ~USE_NEC_V |
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280 | mov cx, 1 |
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281 | mov %1, 16 |
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282 | |
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283 | ALIGN JUMP_ALIGN |
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284 | %%BitLoop: |
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285 | ror cx, 1 ; Prepare to test next bit |
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286 | dec %1 ; Decrement bit index |
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287 | test %2, cx ; Bit set? |
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288 | jz SHORT %%BitLoop |
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289 | %endif |
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290 | |
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291 | pop cx |
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292 | |
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293 | %%Return: |
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294 | ;----------------------------------- |
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295 | %else ; USE_386 |
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296 | bsr %1, %2 |
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297 | %endif |
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298 | %endmacro |
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299 | |
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300 | |
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301 | ;-------------------------------------------------------------------- |
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302 | ; Conditional Move. |
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303 | ; |
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304 | ; eCMOVcc |
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305 | ; Parameters: |
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306 | ; %1: Destination data |
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307 | ; %2: Source data |
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308 | ; Returns: |
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309 | ; Nothing |
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310 | ; Corrupts registers: |
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311 | ; Nothing |
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312 | ;-------------------------------------------------------------------- |
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313 | %macro eCMOVA 2 |
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314 | jbe SHORT %%Return |
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315 | mov %1, %2 |
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316 | %%Return: |
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317 | %endmacro |
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318 | |
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319 | %macro eCMOVC 2 |
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320 | jnc SHORT %%Return |
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321 | mov %1, %2 |
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322 | %%Return: |
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323 | %endmacro |
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324 | |
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325 | %macro eCMOVNC 2 |
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326 | jc SHORT %%Return |
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327 | mov %1, %2 |
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328 | %%Return: |
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329 | %endmacro |
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330 | |
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331 | %macro eCMOVZ 2 |
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332 | jnz SHORT %%Return |
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333 | mov %1, %2 |
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334 | %%Return: |
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335 | %endmacro |
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336 | |
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337 | %macro eCMOVNZ 2 |
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338 | jz SHORT %%Return |
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339 | mov %1, %2 |
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340 | %%Return: |
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341 | %endmacro |
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342 | |
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343 | %macro eCMOVE 2 |
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344 | eCMOVZ %1, %2 |
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345 | %endmacro |
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346 | |
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347 | %macro eCMOVNE 2 |
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348 | eCMOVNZ %1, %2 |
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349 | %endmacro |
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350 | |
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351 | %macro eCMOVB 2 |
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352 | eCMOVC %1, %2 |
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353 | %endmacro |
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354 | |
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355 | %macro eCMOVS 2 |
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356 | jns SHORT %%Return |
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357 | mov %1, %2 |
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358 | %%Return: |
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359 | %endmacro |
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360 | |
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361 | %macro eCMOVNS 2 |
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362 | js SHORT %%Return |
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363 | mov %1, %2 |
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364 | %%Return: |
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365 | %endmacro |
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366 | |
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367 | |
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368 | ;-------------------------------------------------------------------- |
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369 | ; Conditional Set. |
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370 | ; |
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371 | ; eSETcc |
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372 | ; Parameters: |
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373 | ; %1: Destination data |
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374 | ; Returns: |
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375 | ; Nothing |
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376 | ; Corrupts registers: |
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377 | ; Flags |
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378 | ;-------------------------------------------------------------------- |
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379 | %macro eSETZ 1 |
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380 | mov %1, 0 ; Clear while preserving flags |
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381 | jnz SHORT %%Return ; Nothing to set |
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382 | inc %1 |
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383 | %%Return: |
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384 | %endmacro |
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385 | |
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386 | %macro eSETNZ 1 |
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387 | mov %1, 0 ; Clear while preserving flags |
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388 | jz SHORT %%Return ; Nothing to set |
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389 | inc %1 |
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390 | %%Return: |
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391 | %endmacro |
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392 | |
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393 | |
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394 | ;-------------------------------------------------------------------- |
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395 | ; Moves byte with zero-extending to any Register. |
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396 | ; |
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397 | ; eMOVZX |
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398 | ; Parameters: |
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399 | ; %1: Destination Register (SP not supported) |
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400 | ; %2: Byte register or byte address |
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401 | ; Returns: |
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402 | ; Nothing |
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403 | ; Corrupts registers: |
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404 | ; FLAGS |
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405 | ;-------------------------------------------------------------------- |
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406 | %macro eMOVZX 2 |
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407 | %ifndef USE_386 |
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408 | %ifidni %1, ax |
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409 | mov al, %2 |
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410 | xor ah, ah |
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411 | %elifidni %1, bx |
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412 | mov bl, %2 |
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413 | xor bh, bh ; %2 may use BX in effective address |
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414 | %elifidni %1, cx |
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415 | mov cl, %2 |
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416 | xor ch, ch |
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417 | %elifidni %1, dx |
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418 | mov dl, %2 |
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419 | xor dh, dh |
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420 | %else ; SI, DI, BP (all may be used in effective address) |
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421 | FSIS %1, %2 |
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422 | %if strpos |
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423 | push ax |
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424 | mov al, %2 |
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425 | xor ah, ah |
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426 | xchg %1, ax |
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427 | pop ax |
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428 | %else |
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429 | xchg %1, ax |
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430 | mov al, %2 |
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431 | xor ah, ah |
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432 | xchg %1, ax |
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433 | %endif |
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434 | %endif |
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435 | ;----------------------------------- |
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436 | %else |
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437 | movzx %1, %2 |
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438 | %endif |
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439 | %endmacro |
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440 | |
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441 | |
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442 | ;-------------------------------------------------------------------- |
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443 | ; Emulates PUSHA instruction when necessary. |
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444 | ; |
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445 | ; ePUSHA |
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446 | ; Parameters: |
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447 | ; Nothing |
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448 | ; Returns: |
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449 | ; Nothing |
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450 | ; Corrupts registers: |
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451 | ; Nothing |
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452 | ;-------------------------------------------------------------------- |
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453 | %macro ePUSHA 0 |
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454 | %ifndef USE_186 |
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455 | push ax |
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456 | push cx |
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457 | push dx |
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458 | push bx |
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459 | push sp |
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460 | push bp |
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461 | push si |
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462 | push di |
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463 | ;----------------------------------- |
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464 | %else |
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465 | pusha |
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466 | %endif |
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467 | %endmacro |
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468 | |
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469 | |
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470 | ;-------------------------------------------------------------------- |
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471 | ; Emulates POPA instruction when necessary. |
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472 | ; |
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473 | ; ePOPA |
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474 | ; Parameters: |
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475 | ; Nothing |
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476 | ; Returns: |
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477 | ; Nothing |
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478 | ; Corrupts registers: |
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479 | ; Nothing |
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480 | ;-------------------------------------------------------------------- |
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481 | %macro ePOPA 0 |
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482 | %ifndef USE_186 |
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483 | pop di |
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484 | pop si |
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485 | pop bp |
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486 | pop ax ; Skip SP |
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487 | pop bx |
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488 | pop dx |
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489 | pop cx |
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490 | pop ax |
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491 | ;----------------------------------- |
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492 | %else |
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493 | popa |
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494 | %endif |
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495 | %endmacro |
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496 | |
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497 | |
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498 | ;-------------------------------------------------------------------- |
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499 | ; Emulates ENTER instruction when necessary. |
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500 | ; |
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501 | ; eENTER |
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502 | ; Parameters: |
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503 | ; %1: Number of bytes to reserve from stack |
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504 | ; %2: The lexical nesting level (not emulated, set to 0) |
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505 | ; Returns: |
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506 | ; SS:BP: Ptr to old BP |
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507 | ; ([bp-2] points to highest local stack frame word) |
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508 | ; Corrupts registers: |
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509 | ; FLAGS |
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510 | ;-------------------------------------------------------------------- |
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511 | %macro eENTER 2 |
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512 | %ifndef USE_186 |
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513 | push bp |
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514 | mov bp, sp |
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515 | sub sp, %1 |
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516 | ;----------------------------------- |
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517 | %else |
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518 | enter %1, %2 |
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519 | %endif |
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520 | %endmacro |
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521 | |
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522 | ;-------------------------------------------------------------------- |
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523 | ; Emulates LEAVE instruction when necessary. |
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524 | ; |
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525 | ; eLEAVE |
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526 | ; Parameters: |
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527 | ; Nothing |
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528 | ; Returns: |
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529 | ; BP: What it was before eENTER |
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530 | ; Corrupts registers: |
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531 | ; Nothing |
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532 | ;-------------------------------------------------------------------- |
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533 | %macro eLEAVE 0 |
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534 | %ifndef USE_186 |
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535 | mov sp, bp |
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536 | pop bp |
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537 | ;----------------------------------- |
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538 | %else |
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539 | leave |
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540 | %endif |
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541 | %endmacro |
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542 | |
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543 | |
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544 | ;-------------------------------------------------------------------- |
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545 | ; Emulates LSS instruction when necessary. |
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546 | ; |
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547 | ; eLSS |
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548 | ; Parameters: |
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549 | ; %1: Destination register |
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550 | ; %2: Source memory address without brackets |
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551 | ; Returns: |
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552 | ; IF: 0 (interrupts disabled) |
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553 | ; Corrupts registers: |
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554 | ; Nothing |
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555 | ;-------------------------------------------------------------------- |
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556 | %macro eLSS 2 |
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557 | %ifndef USE_386 |
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558 | cli ; Disable interrupts |
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559 | mov %1, [%2] ; Load offset |
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560 | mov ss, [%2+2] ; Load segment |
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561 | ;----------------------------------- |
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562 | %else |
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563 | lss %1, [%2] |
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564 | %endif |
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565 | %endmacro |
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566 | |
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567 | |
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568 | ;-------------------------------------------------------------------- |
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569 | ; Repeats string instruction with segment override. |
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570 | ; This macro prevents 8088/8086 restart bug. |
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571 | ; |
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572 | ; eSEG_STR |
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573 | ; Parameters: |
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574 | ; %1: REP/REPE/REPZ or REPNE/REPNZ prefix |
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575 | ; %2: Source segment override (destination is always ES) |
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576 | ; %3: String instruction |
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577 | ; %4: An exclamation mark (!) if the state of the IF must |
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578 | ; be preserved (can not be used together with CMPS or |
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579 | ; SCAS instructions), otherwise it will be set on |
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580 | ; return from the macro (i.e. interrupts will be on) |
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581 | ; CX: Repeat count |
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582 | ; Returns: |
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583 | ; FLAGS for CMPS and SCAS only |
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584 | ; Corrupts registers: |
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585 | ; FLAGS |
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586 | ;-------------------------------------------------------------------- |
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587 | %macro eSEG_STR 3-4 |
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588 | %ifndef USE_186 ; 8088/8086 has string instruction restart bug when using more than one prefix |
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589 | %ifidn %4, ! ; Preserve the IF |
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590 | FSIS cmps, %3 |
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591 | %ifn strpos |
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592 | FSIS scas, %3 |
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593 | %endif |
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594 | %if strpos |
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595 | %error "The state of the IF can not be preserved when using CMPS or SCAS!" |
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596 | %endif |
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597 | pushf |
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598 | cli |
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599 | %1 ; REP is the prefix that can be lost |
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600 | %2 ; SEG is the prefix that won't be lost |
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601 | %3 ; String instruction |
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602 | popf |
---|
603 | %else ; No need to preserve the IF |
---|
604 | cli |
---|
605 | %1 |
---|
606 | %2 |
---|
607 | %3 |
---|
608 | sti |
---|
609 | %endif |
---|
610 | %else ; No bug on V20/V30/188/186 and later |
---|
611 | %2 |
---|
612 | %1 %3 |
---|
613 | %endif |
---|
614 | %endmacro |
---|
615 | |
---|
616 | |
---|
617 | ;-------------------------------------------------------------------- |
---|
618 | ; Bit shifts and rotates with immediate. |
---|
619 | ; |
---|
620 | ; eSHIFT_IM |
---|
621 | ; Parameters: |
---|
622 | ; %1: Shift target |
---|
623 | ; %2: Number of bits to shift |
---|
624 | ; %3: Instruction (SHL, SHR, ROL, ROR, RCL, RCR) |
---|
625 | ; Returns: |
---|
626 | ; FLAGS |
---|
627 | ; Corrupts registers: |
---|
628 | ; Nothing |
---|
629 | ;-------------------------------------------------------------------- |
---|
630 | %macro eSHIFT_IM 3 |
---|
631 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
---|
632 | %ifndef USE_186 |
---|
633 | %ifidni %1, cl |
---|
634 | times %2 %3 %1, 1 |
---|
635 | %elifidni %1, ch |
---|
636 | times %2 %3 %1, 1 |
---|
637 | %elifidni %1, cx |
---|
638 | times %2 %3 %1, 1 |
---|
639 | %else |
---|
640 | %if %2 > 3 ; Size optimized value |
---|
641 | push cx |
---|
642 | mov cl, %2 |
---|
643 | %3 %1, cl |
---|
644 | pop cx |
---|
645 | %else |
---|
646 | times %2 %3 %1, 1 |
---|
647 | %endif |
---|
648 | %endif |
---|
649 | ;----------------------------------- |
---|
650 | %else |
---|
651 | %3 %1, %2 |
---|
652 | %endif |
---|
653 | %endif |
---|
654 | %endmacro |
---|
655 | |
---|
656 | %macro eSHR_IM 2 |
---|
657 | eSHIFT_IM %1, %2, shr |
---|
658 | %endmacro |
---|
659 | |
---|
660 | %macro eSHL_IM 2 |
---|
661 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
---|
662 | %ifdef USE_386 |
---|
663 | %if %2 = 1 |
---|
664 | FSIS ], %1 |
---|
665 | %if strpos |
---|
666 | eSHIFT_IM %1, %2, shl |
---|
667 | %else |
---|
668 | add %1, %1 ; Same size but faster on 386 and 486. |
---|
669 | %endif |
---|
670 | %else |
---|
671 | eSHIFT_IM %1, %2, shl |
---|
672 | %endif |
---|
673 | %else |
---|
674 | eSHIFT_IM %1, %2, shl |
---|
675 | %endif |
---|
676 | %endif |
---|
677 | %endmacro |
---|
678 | |
---|
679 | %macro eROR_IM 2 |
---|
680 | eSHIFT_IM %1, %2, ror |
---|
681 | %endmacro |
---|
682 | |
---|
683 | %macro eROL_IM 2 |
---|
684 | eSHIFT_IM %1, %2, rol |
---|
685 | %endmacro |
---|
686 | |
---|
687 | %macro eRCR_IM 2 |
---|
688 | eSHIFT_IM %1, %2, rcr |
---|
689 | %endmacro |
---|
690 | |
---|
691 | %macro eRCL_IM 2 |
---|
692 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
---|
693 | %ifdef USE_386 |
---|
694 | %if %2 = 1 |
---|
695 | FSIS ], %1 |
---|
696 | %if strpos |
---|
697 | eSHIFT_IM %1, %2, rcl |
---|
698 | %else |
---|
699 | adc %1, %1 ; Same size but faster on 386 and 486. |
---|
700 | %endif |
---|
701 | %else |
---|
702 | eSHIFT_IM %1, %2, rcl |
---|
703 | %endif |
---|
704 | %else |
---|
705 | eSHIFT_IM %1, %2, rcl |
---|
706 | %endif |
---|
707 | %endif |
---|
708 | %endmacro |
---|
709 | |
---|
710 | |
---|
711 | ;-------------------------------------------------------------------- |
---|
712 | ; Emulates PUSH imm instruction when necessary. |
---|
713 | ; |
---|
714 | ; ePUSH_I |
---|
715 | ; Parameters: |
---|
716 | ; %1: Immediate to push |
---|
717 | ; Returns: |
---|
718 | ; Nothing |
---|
719 | ; Corrupts registers: |
---|
720 | ; Nothing |
---|
721 | ;-------------------------------------------------------------------- |
---|
722 | %macro ePUSH_I 1 |
---|
723 | %ifndef USE_186 |
---|
724 | push bp ; Immediate goes here |
---|
725 | push bp |
---|
726 | mov bp, sp |
---|
727 | mov WORD [bp+2], %1 |
---|
728 | pop bp |
---|
729 | ;----------------------------------- |
---|
730 | %else |
---|
731 | push %1 |
---|
732 | %endif |
---|
733 | %endmacro |
---|
734 | |
---|
735 | |
---|
736 | ;-------------------------------------------------------------------- |
---|
737 | ; Emulates PUSH imm instruction when necessary. |
---|
738 | ; ePUSH_T uses temporary register for faster performance |
---|
739 | ; and smaller code size than ePUSH_I. |
---|
740 | ; |
---|
741 | ; ePUSH_T |
---|
742 | ; Parameters: |
---|
743 | ; %1: Temporary Register |
---|
744 | ; %2: Immediate to push |
---|
745 | ; Returns: |
---|
746 | ; Nothing |
---|
747 | ; Corrupts registers: |
---|
748 | ; %1 |
---|
749 | ;-------------------------------------------------------------------- |
---|
750 | %macro ePUSH_T 2 |
---|
751 | %ifndef USE_186 |
---|
752 | %ifidni %2, 0 |
---|
753 | xor %1, %1 |
---|
754 | %else |
---|
755 | mov %1, %2 |
---|
756 | %endif |
---|
757 | push %1 |
---|
758 | ;----------------------------------- |
---|
759 | %else |
---|
760 | push %2 |
---|
761 | %endif |
---|
762 | %endmacro |
---|
763 | |
---|
764 | |
---|
765 | %endif ; EMULATE_INC |
---|