Index: trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm
===================================================================
--- trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm	(revision 526)
+++ trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm	(revision 536)
@@ -61,12 +61,16 @@
 	je		SHORT .ReverseA0andA3fromRegisterIndexInDX
 
+	eSHL_IM	dx, 1	; ADP50L and XT-CF
 	cmp		al, DEVICE_8BIT_JRIDE_ISA
-	jne		SHORT .ShlRegisterIndexInDX			; All XT-CF modes
-	; Fall to .InputToALfromMemoryMappedRegisterInDX
-
-.InputToALfromMemoryMappedRegisterInDX:
+	jb		SHORT .InputToALfromRegisterInDX	; All XT-CF modes
+	mov		bh, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8
+	je		SHORT .InputToALfromMemoryMappedRegisterInBX
+	mov		bl, dl
+	mov		bh,	ADP50L_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8
+
+.InputToALfromMemoryMappedRegisterInBX:
 	push	ds
-	mov		ds, [di+DPT.wBasePort]	; Segment for JR-IDE/ISA
-	mov		al, [bx+JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET]
+	mov		ds, [di+DPT.wBasePort]	; Segment for JR-IDE/ISA and ADP50L
+	mov		al, [bx]
 	pop		ds
 	ret
@@ -75,9 +79,4 @@
 .ReverseA0andA3fromRegisterIndexInDX:
 	mov		dl, [cs:bx+g_rgbSwapA0andA3fromIdeRegisterIndex]
-	SKIP2B	bx	; Skip shl dx, 1
-
-.ShlRegisterIndexInDX:
-	eSHL_IM	dx, 1
-	; Fall to .InputToALfromRegisterInDX
 
 .InputToALfromRegisterInDX:
@@ -108,11 +107,17 @@
 	je		SHORT .ReverseA0andA3fromRegisterIndexInDX
 
+	; At this point remaining controllers (JRIDE, XTCF and ADP50L) all have a control
+	; block offset of 8 or (8<<1) so we add 8 here and do the SHL 1 later if needed.
+	add		dx, 8
 	cmp		bl, DEVICE_8BIT_JRIDE_ISA
-	jne		SHORT .ShlRegisterIndexInDX		; All XT-CF modes
-	; Fall to .OutputALtoMemoryMappedRegisterInDX
-
-.OutputALtoMemoryMappedRegisterInDX:
-	mov		bx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET
-	jmp 	SHORT IdeIO_OutputALtoIdeRegisterInDL.OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX
+	jb		SHORT IdeIO_OutputALtoIdeRegisterInDL.ShlRegisterIndexInDXandOutputAL	; All XT-CF modes
+	mov		bx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET - 8			; Zeroes BL. -8 compensates for the ADD
+	je		SHORT IdeIO_OutputALtoIdeRegisterInDL.OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX
+	; The commented instructions below shows what happens next (saved for clarity) but as an optimization
+	; we can accomplish the same thing with this jump.
+	jmp		SHORT IdeIO_OutputALtoIdeRegisterInDL.ShlDXandMovHighByteOfADP50LoffsetsToBH
+;	eSHL_IM	dx, 1
+;	mov		bh, (ADP50L_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET - 16) >> 8	; -16 compensates for the ADD and SHL
+;	jmp 	SHORT IdeIO_OutputALtoIdeRegisterInDL.OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX
 %endif
 
@@ -122,17 +127,15 @@
 	; a small trick since we only access Device Control Register at
 	; offset 6h: Always clear A3 and set A0.
+	mov		bh, dh	; Zero BH
 	add		dx, [cs:bx+IDEVARS.wControlBlockPort]
 	xor		dl, 1001b						; Clear A3, Set A0
-	jmp		SHORT OutputALtoPortInDX
-
-.ShlRegisterIndexInDX:
-	eSHL_IM	dx, 1
-	add		dx, BYTE XTCF_CONTROL_BLOCK_OFFSET
-	jmp		SHORT OutputALtoRegisterInDX
+	out		dx, al
+	ret
 
 .OutputALtoControlBlockRegisterInDX:
-	call	AccessDPT_GetIdevarsToCSBX
+	call	AccessDPT_GetIdevarsToCSBX		; *FIXME* Why is this call here but not in the above block?
 	add		dx, [cs:bx+IDEVARS.wControlBlockPort]
-	jmp		SHORT OutputALtoPortInDX
+	out		dx, al
+	ret
 
 
@@ -160,13 +163,15 @@
 
 	cmp		bl, DEVICE_8BIT_JRIDE_ISA
-	jne		SHORT .ShlRegisterIndexInDX		; All XT-CF modes
-	; Fall to .OutputALtoMemoryMappedRegisterInDX
-
-.OutputALtoMemoryMappedRegisterInDX:
-	mov		bx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET
+	jb		SHORT .ShlRegisterIndexInDXandOutputAL	; All XT-CF modes
+	mov		bx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET	; Zeroes BL
+	je		SHORT .OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX
+.ShlDXandMovHighByteOfADP50LoffsetsToBH:
+	eSHL_IM	dx, 1
+	mov		bh, ADP50L_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8	; BL is zero so we only need to change BH
+
 .OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX:
 	add		bx, dx
 	push	ds
-	mov		ds, [di+DPT.wBasePort]	; Segment for JR-IDE/ISA
+	mov		ds, [di+DPT.wBasePort]	; Segment for JR-IDE/ISA and ADP50L
 	mov		[bx], al
 	pop		ds
@@ -177,7 +182,7 @@
 	mov		bx, dx
 	mov		dl, [cs:bx+g_rgbSwapA0andA3fromIdeRegisterIndex]
-	SKIP2B	bx	; Skip shl dx, 1
-
-.ShlRegisterIndexInDX:
+	SKIP2B	bx	; Skip eSHL_IM dx, 1
+
+.ShlRegisterIndexInDXandOutputAL:
 	eSHL_IM	dx, 1
 	; Fall to OutputALtoRegisterInDX
@@ -186,5 +191,4 @@
 OutputALtoRegisterInDX:
 	add		dx, [di+DPT.wBasePort]
-OutputALtoPortInDX:
 	out		dx, al
 	ret
