1 | ; File name : HStatus.asm |
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2 | ; Project name : IDE BIOS |
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3 | ; Created date : 15.12.2009 |
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4 | ; Last update : 13.4.2010 |
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5 | ; Author : Tomi Tilli |
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6 | ; Description : IDE Status Register polling functions. |
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7 | |
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8 | ; Section containing code |
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9 | SECTION .text |
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10 | |
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11 | ;-------------------------------------------------------------------- |
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12 | ; Waits Hard Disk IRQ when not transferring data. |
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13 | ; If interrupts are disabled, RDY flag is polled. |
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14 | ; |
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15 | ; HStatus_WaitIrqOrRdy |
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16 | ; Parameters: |
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17 | ; DS:BX: Ptr to DPT |
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18 | ; Returns: |
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19 | ; AH: BIOS Error code |
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20 | ; CF: 0 if wait succesfull |
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21 | ; 1 if any error |
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22 | ; Corrupts registers: |
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23 | ; AL, CX, DX |
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24 | ;-------------------------------------------------------------------- |
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25 | ALIGN JUMP_ALIGN |
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26 | HStatus_WaitIrqOrRdy: |
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27 | test BYTE [di+DPT.bDrvCtrl], FLG_IDE_CTRL_nIEN |
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28 | jz HIRQ_WaitIRQ ; Wait for IRQ if enabled |
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29 | call HStatus_ReadAndIgnoreAlternateStatus |
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30 | mov cl, B_TIMEOUT_DRQ ; Load DRQ (not RDY) timeout |
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31 | jmp SHORT HStatus_WaitRdy ; Jump to poll RDY |
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32 | |
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33 | |
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34 | ;-------------------------------------------------------------------- |
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35 | ; Reads Alternate Status Register and ignores result. |
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36 | ; Alternate Status Register is read to prevent polling host from |
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37 | ; reading status before it is valid. |
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38 | ; |
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39 | ; HStatus_ReadAndIgnoreAlternateStatus |
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40 | ; Parameters: |
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41 | ; DS:BX: Ptr to DPT |
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42 | ; Returns: |
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43 | ; Nothing |
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44 | ; Corrupts registers: |
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45 | ; AL, CX, DX |
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46 | ;-------------------------------------------------------------------- |
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47 | ALIGN JUMP_ALIGN |
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48 | HStatus_ReadAndIgnoreAlternateStatus: |
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49 | mov cx, bx ; Backup BX |
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50 | eMOVZX bx, BYTE [bx+DPT.bIdeOff] ; CS:BX now points to IDEVARS |
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51 | mov dx, [cs:bx+IDEVARS.wPortCtrl] ; DX = Control Block base port |
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52 | add dx, BYTE REGR_IDEC_AST ; DX = Alternate Status Register address |
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53 | in al, dx ; Read Alternate Status Register |
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54 | mov bx, cx ; Restore BX |
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55 | ret |
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56 | |
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57 | |
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58 | ;-------------------------------------------------------------------- |
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59 | ; Waits until Hard Disk is ready to transfer data. |
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60 | ; |
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61 | ; HStatus_WaitIrqOrDrq |
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62 | ; Parameters: |
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63 | ; DS:BX: Ptr to DPT (in RAMVARS segment) |
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64 | ; Returns: |
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65 | ; AH: BIOS Error code |
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66 | ; CF: 0 if wait succesfull |
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67 | ; 1 if any error |
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68 | ; Corrupts registers: |
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69 | ; AL |
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70 | ;-------------------------------------------------------------------- |
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71 | ALIGN JUMP_ALIGN |
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72 | HStatus_WaitIrqOrDrq: |
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73 | push dx |
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74 | push cx |
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75 | |
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76 | ; Check if interrupts are enabled |
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77 | test BYTE [bx+DPT.bDrvCtrl], FLG_IDE_CTRL_nIEN |
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78 | jnz SHORT .PollDRQ ; Poll DRQ if IRQ disabled |
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79 | call HIRQ_WaitIRQ ; Wait for IRQ |
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80 | jmp SHORT .Return |
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81 | |
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82 | ALIGN JUMP_ALIGN |
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83 | .PollDRQ: |
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84 | call HStatus_ReadAndIgnoreAlternateStatus |
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85 | call HStatus_WaitDrqDefTime |
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86 | ALIGN JUMP_ALIGN |
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87 | .Return: |
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88 | pop cx |
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89 | pop dx |
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90 | ret |
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91 | |
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92 | |
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93 | ;-------------------------------------------------------------------- |
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94 | ; Waits until busy flag is cleared from selected Hard Disk drive. |
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95 | ; |
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96 | ; HStatus_WaitBsyDefTime Uses default timeout |
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97 | ; HStatus_WaitBsy Uses user defined timeout |
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98 | ; HStatus_WaitBsyBase Uses user base port address and timeout |
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99 | ; Parameters: |
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100 | ; CL: Timeout value in system timer ticks (not HStatus_WaitBsyDefTime) |
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101 | ; DX: IDE Base port address (HUtil_WaitBsyBase only) |
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102 | ; DS: Segment to RAMVARS |
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103 | ; Returns: |
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104 | ; AH: BIOS Error code |
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105 | ; DX: IDE Status Register Address |
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106 | ; CF: 0 if wait succesfull |
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107 | ; 1 if any error |
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108 | ; Corrupts registers: |
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109 | ; AL, CX |
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110 | ;-------------------------------------------------------------------- |
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111 | ALIGN JUMP_ALIGN |
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112 | HStatus_WaitBsyDefTime: |
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113 | mov cl, B_TIMEOUT_BSY ; Load timeout value |
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114 | ALIGN JUMP_ALIGN |
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115 | HStatus_WaitBsy: |
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116 | mov dx, [RAMVARS.wIdeBase] ; Load offset to base port |
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117 | ALIGN JUMP_ALIGN |
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118 | HStatus_WaitBsyBase: |
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119 | add dx, BYTE REGR_IDE_ST ; Add offset to status reg |
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120 | jmp SHORT HStatus_PollBsy ; Wait until not busy |
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121 | |
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122 | |
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123 | ;-------------------------------------------------------------------- |
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124 | ; Waits until Hard Disk is ready to accept commands. |
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125 | ; |
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126 | ; HStatus_WaitRdyDefTime Uses default timeout |
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127 | ; HStatus_WaitRdy Uses user defined timeout |
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128 | ; HStatus_WaitRdyBase Uses user base port address and timeout |
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129 | ; Parameters: |
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130 | ; CL: Timeout value in system timer ticks (not HStatus_WaitRdyDefTime) |
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131 | ; DX: IDE Base port address (HStatus_WaitRdyBase only) |
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132 | ; DS: Segment to RAMVARS |
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133 | ; Returns: |
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134 | ; AH: BIOS Error code |
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135 | ; DX: IDE Status Register Address |
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136 | ; CF: 0 if wait succesfull |
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137 | ; 1 if any error |
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138 | ; Corrupts registers: |
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139 | ; AL, CX |
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140 | ;-------------------------------------------------------------------- |
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141 | ALIGN JUMP_ALIGN |
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142 | HStatus_WaitRdyDefTime: |
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143 | mov cl, B_TIMEOUT_RDY ; Load timeout value |
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144 | ALIGN JUMP_ALIGN |
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145 | HStatus_WaitRdy: |
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146 | mov dx, [RAMVARS.wIdeBase] ; Load offset to base port |
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147 | ALIGN JUMP_ALIGN |
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148 | HStatus_WaitRdyBase: |
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149 | add dx, BYTE REGR_IDE_ST ; Add offset to status reg |
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150 | mov ah, FLG_IDE_ST_DRDY ; Flag to poll |
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151 | jmp SHORT HStatus_PollBsyAndFlg ; Wait until flag set |
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152 | |
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153 | |
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154 | ;-------------------------------------------------------------------- |
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155 | ; Waits until Hard Disk is ready to transfer data. |
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156 | ; Note! This function polls DRQ even if interrupts are enabled! |
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157 | ; |
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158 | ; HStatus_WaitDrqDefTime Uses default timeout |
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159 | ; HStatus_WaitDrq Uses user defined timeout |
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160 | ; HStatus_WaitDrqBase Uses user base port address and timeout |
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161 | ; Parameters: |
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162 | ; CL: Timeout value in system timer ticks (not HStatus_WaitDrqDefTime) |
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163 | ; DX: IDE Base port address (HStatus_WaitDrqBase only) |
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164 | ; DS: Segment to RAMVARS |
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165 | ; Returns: |
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166 | ; AH: BIOS Error code |
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167 | ; DX: IDE Status Register Address |
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168 | ; CF: 0 if wait succesfull |
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169 | ; 1 if any error |
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170 | ; Corrupts registers: |
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171 | ; AL, CX |
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172 | ;-------------------------------------------------------------------- |
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173 | ALIGN JUMP_ALIGN |
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174 | HStatus_WaitDrqDefTime: |
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175 | mov cl, B_TIMEOUT_DRQ ; Load timeout value |
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176 | ALIGN JUMP_ALIGN |
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177 | HStatus_WaitDrq: |
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178 | mov dx, [RAMVARS.wIdeBase] ; Load offset to base port |
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179 | ALIGN JUMP_ALIGN |
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180 | HStatus_WaitDrqBase: |
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181 | add dx, BYTE REGR_IDE_ST ; Add offset to status reg |
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182 | mov ah, FLG_IDE_ST_DRQ ; Flag to poll |
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183 | ; Fall to HStatus_PollBsyAndFlg |
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184 | |
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185 | ;-------------------------------------------------------------------- |
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186 | ; IDE Status register polling. |
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187 | ; This function first waits until controller is not busy. |
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188 | ; When not busy, IDE Status Register is polled until wanted |
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189 | ; flag (HBIT_ST_DRDY or HBIT_ST_DRQ) is set. |
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190 | ; |
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191 | ; HStatus_PollBusyAndFlg |
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192 | ; Parameters: |
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193 | ; AH: Status Register Flag to poll (until set) when not busy |
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194 | ; CL: Timeout value in system timer ticks |
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195 | ; DX: IDE Status Register Address |
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196 | ; DS: Segment to RAMVARS |
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197 | ; Returns: |
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198 | ; AH: BIOS Error code |
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199 | ; CF: Clear if wait completed successfully (no errors) |
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200 | ; Set if any error |
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201 | ; Corrupts registers: |
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202 | ; AL, CX |
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203 | ;-------------------------------------------------------------------- |
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204 | ALIGN JUMP_ALIGN |
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205 | HStatus_PollBsyAndFlg: |
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206 | call SoftDelay_InitTimeout ; Initialize timeout counter |
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207 | ALIGN JUMP_ALIGN |
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208 | .PollLoop: |
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209 | in al, dx ; Load IDE Status Register |
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210 | test al, FLG_IDE_ST_BSY ; Controller busy? |
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211 | jnz SHORT .UpdateTimeout ; If so, jump to timeout update |
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212 | test al, ah ; Test secondary flag |
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213 | jnz SHORT HStatus_PollCompleted ; If set, break loop |
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214 | ALIGN JUMP_ALIGN |
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215 | .UpdateTimeout: |
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216 | call SoftDelay_UpdTimeout ; Update timeout counter |
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217 | jnc SHORT .PollLoop ; Loop if time left (sets CF on timeout) |
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218 | mov ah, RET_HD_TIMEOUT ; Load error code for timeout |
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219 | ret |
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220 | |
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221 | |
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222 | ;-------------------------------------------------------------------- |
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223 | ; IDE Status register polling. |
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224 | ; This function waits until controller is not busy. |
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225 | ; |
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226 | ; HStatus_PollBsy |
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227 | ; Parameters: |
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228 | ; CL: Timeout value in system timer ticks |
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229 | ; DX: IDE Status Register Address |
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230 | ; DS: Segment to RAMVARS |
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231 | ; Returns: |
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232 | ; AH: BIOS Error code |
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233 | ; CF: Clear if wait completed successfully (no errors) |
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234 | ; Set if any error |
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235 | ; Corrupts registers: |
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236 | ; AL, CX |
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237 | ;-------------------------------------------------------------------- |
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238 | ALIGN JUMP_ALIGN |
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239 | HStatus_PollBsy: |
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240 | call SoftDelay_InitTimeout ; Initialize timeout counter |
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241 | ALIGN JUMP_ALIGN |
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242 | .PollLoop: |
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243 | in al, dx ; Load IDE Status Reg |
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244 | test al, FLG_IDE_ST_BSY ; Controller busy? (clears CF) |
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245 | jz SHORT HStatus_PollCompleted ; If not, jump to check errors |
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246 | call SoftDelay_UpdTimeout ; Update timeout counter |
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247 | jnc SHORT .PollLoop ; Loop if time left (sets CF on timeout) |
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248 | mov ah, RET_HD_TIMEOUT ; Load error code for timeout |
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249 | ret |
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250 | |
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251 | ALIGN JUMP_ALIGN |
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252 | HStatus_PollCompleted: |
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253 | test al, FLG_IDE_ST_DF | FLG_IDE_ST_ERR |
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254 | jnz SHORT .GetErrorCode ; If errors, jump to get error code |
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255 | xor ah, ah ; Zero AH and clear CF |
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256 | ret |
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257 | .GetErrorCode: |
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258 | jmp HError_GetErrorCodeForStatusReg |
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