source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc @ 601

Last change on this file since 601 was 601, checked in by krille_n_, 5 years ago

Changes:

  • Building the BIOS now works again.
  • Added a new IDE device type/transfer mode for use only with XT-IDE rev 2+ (or Chuck(G)-modded rev 1) cards installed in any of the following machines: Olivetti M24, AT&T PC6300, Xerox 6060 and Logabax Persona 1600. This new transfer mode is slightly faster than the regular XT-IDE rev 1 device type and requires that the card is configured for High Speed mode (or, in case of the card being a rev 1 card, has the Chuck(G) mod done). The new device type is called "XTIDE rev 2 (Olivetti M24)" in XTIDECFG.
  • Made some minor improvements to the library code that handles 'Drive Not Ready' errors in XTIDECFG.
  • Optimizations.
File size: 9.7 KB
RevLine 
[90]1; Project name  :   XTIDE Universal BIOS
[3]2; Description   :   Defines for ROMVARS struct containing variables stored
3;                   in BIOS ROM.
[376]4
5;
[380]6; XTIDE Universal BIOS and Associated Tools
[526]7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
[376]8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
[380]13;
[376]14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
[380]17; GNU General Public License for more details.
[376]18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
[3]21%ifndef ROMVARS_INC
22%define ROMVARS_INC
23
[90]24
[593]25; Master/Slave drive specific parameters
26struc DRVPARAMS
27    .wFlags         resb    2   ; Drive flags
28    .dwMaximumLBA:              ; User specified maximum number of sectors
29    .wCylinders     resb    2   ; User specified cylinders (1...16383)
30    .wHeadsAndSectors:
31    .bHeads         resb    1   ; User specified Heads (1...16)
32    .bSect          resb    1   ; User specified Sectors per track (1...63)
[3]33endstruc
34
[593]35; Bit defines for DRVPARAMS.wFlags - these flags are accessed as bytes so changes here might require changes elsewhere
36MASK_DRVPARAMS_WRITECACHE       EQU (3<<0)  ; Bits 0...1, Drive internal write cache settings (must start at bit 0)
37    DEFAULT_WRITE_CACHE             EQU 0   ; Must be 0
38    DISABLE_WRITE_CACHE             EQU 1
39    ENABLE_WRITE_CACHE              EQU 2
40MASK_DRVPARAMS_TRANSLATEMODE    EQU (3<<TRANSLATEMODE_FIELD_POSITION)   ; Bits 2...3, Position shared with DPT
41    TRANSLATEMODE_FIELD_POSITION    EQU 2
42    TRANSLATEMODE_NORMAL            EQU 0   ; Must be zero
43    TRANSLATEMODE_LARGE             EQU 1
44    TRANSLATEMODE_ASSISTED_LBA      EQU 2   ; 28-bit or 48-bit LBA
45    TRANSLATEMODE_AUTO              EQU 3   ; Only available in ROMVARS, not in DPTs
46FLG_DRVPARAMS_BLOCKMODE         EQU (1<<4)  ; Enable Block mode transfers
47FLG_DRVPARAMS_USERCHS           EQU (1<<5)  ; User specified P-CHS values
48    MAX_PCHS_CYLINDERS              EQU 16383
49    MAX_PCHS_HEADS                  EQU 16
50    MAX_PCHS_SECTORS_PER_TRACK      EQU 63
51    MAX_PCHS_TOTAL_SECTOR_COUNT     EQU (MAX_PCHS_CYLINDERS * MAX_PCHS_HEADS * MAX_PCHS_SECTORS_PER_TRACK)  ; 16,514,064
52FLG_DRVPARAMS_USERLBA           EQU (1<<6)  ; User specified LBA value
[316]53
[507]54
[3]55; Controller specific variables
56struc IDEVARS
[233]57;;; Word 0
58    .wSerialPortAndBaud:                    ; Serial connection port (low, divided by 4) and baud rate divisor (high)
[473]59    .wBasePort:                             ; IDE Base Port for Command Block (usual) Registers
[233]60    .bSerialPort                resb    1
61    .bSerialBaud                resb    1
[196]62
[233]63;;; Word 1
[473]64    .wControlBlockPort:
[233]65    .bSerialUnused              resb    1   ; IDE Base Port for Control Block Registers
[196]66
[233]67    .wSerialCOMPortCharAndDevice:           ; In DetectPrint, we grab the COM Port char and Device at the same time
68    .bSerialCOMPortChar         resb    1   ; Serial connection COM port number/letter
69
70;;; Word 2
[196]71    .bDevice                    resb    1   ; Device type
72    .bIRQ                       resb    1   ; Interrupt Request Number
[233]73
74;;; And more...
[196]75    .drvParamsMaster            resb    DRVPARAMS_size
76    .drvParamsSlave             resb    DRVPARAMS_size
[3]77endstruc
78
[261]79%ifndef CHECK_FOR_UNUSED_ENTRYPOINTS
80    %if IDEVARS.bSerialCOMPortChar+1 != IDEVARS.bDevice
81        %error "IDEVARS.bSerialCOMPortChar needs to come immediately before IDEVARS.bDevice so that both bytes can be fetched at the same time inside DetectPrint.asm"
82    %endif
[233]83%endif
84
[496]85STANDARD_CONTROL_BLOCK_OFFSET           EQU     200h
[545]86XTIDE_CONTROL_BLOCK_OFFSET              EQU     8h      ; for XTIDE, A3 is used to control selected register (CS0 vs CS1)...
[558]87XTCF_CONTROL_BLOCK_OFFSET               EQU     10h     ; ...and for XT-CF (all variants), it's A4
[536]88ADP50L_CONTROL_BLOCK_OFFSET             EQU     10h
[496]89
[199]90; Default values for Port and PortCtrl, shared with the configurator
91;
[545]92DEVICE_XTIDE_DEFAULT_PORT               EQU     300h    ; Also the default port for XT-CF
[496]93DEVICE_XTIDE_DEFAULT_PORTCTRL           EQU     (DEVICE_XTIDE_DEFAULT_PORT + XTIDE_CONTROL_BLOCK_OFFSET)
[545]94; Note XT-CF control port is SHL 1 relative to XTIDE, and coded that way hence no need for specific definition like...
[547]95; DEVICE_XTCF_DEFAULT_PORTCTRL          EQU     (DEVICE_XTIDE_DEFAULT_PORT + XTCF_CONTROL_BLOCK_OFFSET)
[199]96
[496]97DEVICE_ATA_PRIMARY_PORT                 EQU     1F0h
98DEVICE_ATA_PRIMARY_PORTCTRL             EQU     (DEVICE_ATA_PRIMARY_PORT + STANDARD_CONTROL_BLOCK_OFFSET)
[398]99
100DEVICE_ATA_SECONDARY_PORT               EQU     170h
[496]101DEVICE_ATA_SECONDARY_PORTCTRL           EQU     (DEVICE_ATA_SECONDARY_PORT + STANDARD_CONTROL_BLOCK_OFFSET)
[398]102
103DEVICE_ATA_TERTIARY_PORT                EQU     1E8h
[503]104DEVICE_ATA_TERTIARY_PORTCTRL            EQU     (DEVICE_ATA_TERTIARY_PORT + STANDARD_CONTROL_BLOCK_OFFSET)
[398]105
106DEVICE_ATA_QUATERNARY_PORT              EQU     168h
[503]107DEVICE_ATA_QUATERNARY_PORTCTRL          EQU     (DEVICE_ATA_QUATERNARY_PORT + STANDARD_CONTROL_BLOCK_OFFSET)
[398]108
109
[175]110; Device types for IDEVARS.bDevice
[473]111; IDE Devices are grouped so device numbers cannot be changed without modifying code elsewhere!
[480]112COUNT_OF_STANDARD_IDE_DEVICES           EQU 2   ; 16- and 32-bit controllers
[601]113COUNT_OF_8BIT_IDE_DEVICES               EQU 10
[473]114COUNT_OF_ALL_IDE_DEVICES                EQU (COUNT_OF_8BIT_IDE_DEVICES + COUNT_OF_STANDARD_IDE_DEVICES)
115; Standard port mapped I/O
116DEVICE_16BIT_ATA                        EQU (0<<1)
117DEVICE_32BIT_ATA                        EQU (1<<1)
[482]118DEVICE_8BIT_ATA                         EQU ((COUNT_OF_STANDARD_IDE_DEVICES+0)<<1)  ; 16- or 32-bit controller in 8-bit mode
119DEVICE_8BIT_XTIDE_REV1                  EQU ((COUNT_OF_STANDARD_IDE_DEVICES+1)<<1)
[473]120; Address lines A0 and A3 are swapped
[601]121DEVICE_8BIT_XTIDE_REV2                  EQU ((COUNT_OF_STANDARD_IDE_DEVICES+2)<<1)  ; Or rev 1 with swapped A0 and A3...
122DEVICE_8BIT_XTIDE_REV2_OLIVETTI         EQU ((COUNT_OF_STANDARD_IDE_DEVICES+3)<<1)  ; ...in Olivetti M24 and derivatives
[473]123; IDE Register offsets are SHL 1
[601]124DEVICE_8BIT_XTCF_PIO8                   EQU ((COUNT_OF_STANDARD_IDE_DEVICES+4)<<1)  ; XT-CF using 8-bit PIO mode
125DEVICE_8BIT_XTCF_PIO8_WITH_BIU_OFFLOAD  EQU ((COUNT_OF_STANDARD_IDE_DEVICES+5)<<1)  ; XT-CF using 8-bit PIO mode, but with 16-bit instructions
126DEVICE_8BIT_XTCF_PIO16_WITH_BIU_OFFLOAD EQU ((COUNT_OF_STANDARD_IDE_DEVICES+6)<<1)  ; Lo-tech 8-bit IDE Adapter
127DEVICE_8BIT_XTCF_DMA                    EQU ((COUNT_OF_STANDARD_IDE_DEVICES+7)<<1)  ; XT-CFv3 using DMA
[473]128; Memory Mapped I/O
[601]129DEVICE_8BIT_JRIDE_ISA                   EQU ((COUNT_OF_STANDARD_IDE_DEVICES+8)<<1)  ; JR-IDE/ISA (Memory Mapped I/O)
130DEVICE_8BIT_ADP50L                      EQU ((COUNT_OF_STANDARD_IDE_DEVICES+9)<<1)  ; SVC ADP50L (Memory Mapped I/O)
[473]131; Virtual devices
[400]132DEVICE_SERIAL_PORT                      EQU (COUNT_OF_ALL_IDE_DEVICES<<1)
133
[588]134FIRST_XTCF_DEVICE                       EQU DEVICE_8BIT_XTCF_PIO8
135LAST_XTCF_DEVICE                        EQU DEVICE_8BIT_XTCF_DMA
136XTCF_DEVICE_OFFSET                      EQU FIRST_XTCF_DEVICE                       ; Used for XT-CF device <--> mode conversion
[400]137
[593]138
139; ROM Variables. Written to the ROM image before flashing.
140struc ROMVARS
141    .wRomSign           resb    2   ; ROM Signature (AA55h)
142    .bRomSize           resb    1   ; ROM size in 512 byte blocks
143    .rgbJump            resb    3   ; First instruction to ROM init (jmp)
144
145    .rgbSign            resb    8   ; Signature for XTIDE Configurator Program
146    .szTitle            resb    31  ; BIOS title string
147    .szVersion          resb    25  ; BIOS version string
148
149    .wFlags             resb    2   ; Word for ROM flags
150    .wDisplayMode       resb    2   ; Display mode for boot menu
151    .wBootTimeout       resb    2   ; Boot Menu selection timeout in system timer ticks
152    .pColorTheme        resb    2   ; Ptr to the color attribute struc used by the boot menu and hotkey bar
153    .bIdeCnt            resb    1   ; Number of available IDE controllers
154    .bBootDrv           resb    1   ; Default drive to boot from
155    .bMinFddCnt         resb    1   ; Minimum number of Floppy Drives
156    .bStealSize         resb    1   ; Number of 1kB blocks stolen from 640kB base RAM
157    .bIdleTimeout       resb    1   ; Standby timer value
158
159    .ideVarsBegin:
160    .ideVars0           resb    IDEVARS_size
161    .ideVars1           resb    IDEVARS_size
162    .ideVars2           resb    IDEVARS_size
163    .ideVars3           resb    IDEVARS_size
164
165%ifdef MODULE_SERIAL
166    .ideVarsSerialAuto  resb    IDEVARS_size
167%endif
168
169    .ideVarsEnd:
[3]170endstruc
171
[593]172%ifndef CHECK_FOR_UNUSED_ENTRYPOINTS
173    %if ROMVARS.ideVarsEnd & 0xff00 <> 0
174        %error ".ideVars structures must fit within the first 256 bytes of the ROM image"
175    %endif
176    %if (ROMVARS.ideVarsEnd - ROMVARS.ideVarsBegin) = 0
177        %error "there must be at least one .ideVars structure, it would be bizarre if this were not true, but it is assumed in the ah0h reset code."
178    %endif
179%endif
[3]180
[593]181NUMBER_OF_IDEVARS                   EQU ((ROMVARS.ideVarsEnd - ROMVARS.ideVarsBegin) / IDEVARS_size)
182
183; Bit defines for ROMVARS.wFlags
184FLG_ROMVARS_FULLMODE                    EQU (1<<0)  ; Full operating mode (steals base RAM, supports EBIOS etc.)
185FLG_ROMVARS_IGNORE_MOTHERBOARD_DRIVES   EQU (1<<1)  ; Ignores drives configured in motherboard BIOS setup.
186                                                    ; For now it is a hack to get Windows 95 IDE drivers working
187                                                    ; but it will be needed later when XTUB supports dynamic drive overlay.
188                                                    ; Because of that this must be included into AT builds and cannot be a
189                                                    ; module (any AT or 386 must be installable to the hard drive so
190                                                    ; there won't be need for even more different builds).
191FLG_ROMVARS_SERIAL_SCANDETECT           EQU (1<<3)  ; Scan COM ports at the end of drive detection.  Can also be invoked
192                                                    ; by holding down the ALT key at the end of drive detection.
193                                                    ; (Conveniently, this is 8, a fact we exploit when testing the bit)
194
195; Here in case the configuration needs to know functionality is present. Note! Changing the order/location of these flags
196; also requires changes elsewhere as they are usually tested using byte-accesses for efficiency.
197FLG_ROMVARS_MODULE_POWER_MANAGEMENT     EQU (1<<5)
198FLG_ROMVARS_MODULE_8BIT_IDE             EQU (1<<6)
199FLG_ROMVARS_MODULE_8BIT_IDE_ADVANCED    EQU (1<<7)
200FLG_ROMVARS_MODULE_ADVANCED_ATA         EQU (1<<8)
201FLG_ROMVARS_MODULE_BOOT_MENU            EQU (1<<9)
202FLG_ROMVARS_MODULE_EBIOS                EQU (1<<10)
203FLG_ROMVARS_MODULE_HOTKEYS              EQU (1<<11)
204FLG_ROMVARS_MODULE_IRQ                  EQU (1<<12)
205FLG_ROMVARS_MODULE_SERIAL               EQU (1<<13)
206FLG_ROMVARS_MODULE_SERIAL_FLOPPY        EQU (1<<14)
207FLG_ROMVARS_MODULE_STRINGS_COMPRESSED   EQU (1<<15)
208
209
210; Boot Menu Display Modes (see Assembly Library Display.inc for standard modes)
211DEFAULT_TEXT_MODE       EQU 4
212
213
[3]214%endif ; ROMVARS_INC
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