1 | ; Project name : Emulation library |
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2 | ; Description : Macros for emulating later x86 instructions with older |
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3 | ; processors. |
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4 | ; Macros are used so optimized builds can be done |
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5 | ; easily for different processors. |
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6 | ; |
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7 | ; This file must be first to be included to |
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8 | ; any source file. |
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9 | %ifndef EMULATE_INC |
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10 | %define EMULATE_INC |
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11 | |
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12 | ; Defines for processor support (should be set in makefile). |
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13 | ; Unsupported instructions will be emulated using macros. |
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14 | ; If AT class PC is used (instead of XT), define USE_AT |
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15 | |
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16 | ;%define USE_186 ; Define to use 18x/V20/V30 instructions |
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17 | ;%define USE_286 ; Define to use 286 instructions |
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18 | ;%define USE_386 ; Define to use 386 instructions |
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19 | ;%define USE_AT ; Define for AT class machine |
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20 | |
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21 | %ifdef USE_NEC_V ; This will run on NEC V20/V30 processors only |
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22 | %define USE_186 ; Define to use 18x/V20/V30 instructions |
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23 | %ifdef USE_UNDOC_INTEL OR USE_286 OR USE_386 |
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24 | %fatal "Conflicting processor define used together with USE_NEC_V!" |
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25 | %endif |
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26 | %endif |
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27 | |
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28 | %ifdef USE_386 |
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29 | %define USE_286 ; Define to use 286 instructions |
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30 | %endif |
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31 | %ifdef USE_286 |
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32 | %define USE_186 ; Define to use 18x/V20/V30 instructions |
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33 | %define USE_UNDOC_INTEL ; Not supported by NEC V20/V30 |
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34 | %endif |
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35 | |
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36 | %ifdef USE_386 |
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37 | CPU 386 ; Allow instructions up to 386 |
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38 | %elifdef USE_286 |
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39 | CPU 286 ; Allow instructions up to 286 |
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40 | %elifdef USE_186 |
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41 | CPU 186 ; Allow instructions up to 188/186/V20/V30 |
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42 | %else |
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43 | CPU 8086 ; Allow 8088/8086 instructions only |
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44 | %endif |
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45 | |
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46 | BITS 16 ; Set 16 bit code generation |
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47 | |
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48 | ; Alignments for jump targets. |
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49 | ; Following values are optimal for different processor types: |
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50 | ; 286 and 386SX WORD (16-bit, 2 bytes) |
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51 | ; 386DX and 486 DWORD (32-bit, 4 bytes) |
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52 | ; Pentium and later QWORD (64-bit, 8 bytes) |
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53 | %ifdef USE_AT |
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54 | %ifdef USE_386 |
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55 | JUMP_ALIGN EQU 4 |
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56 | WORD_ALIGN EQU 2 |
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57 | %else ; USE_286 |
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58 | JUMP_ALIGN EQU 2 |
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59 | WORD_ALIGN EQU 2 |
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60 | %endif |
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61 | %else ; XT |
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62 | JUMP_ALIGN EQU 1 |
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63 | WORD_ALIGN EQU 1 |
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64 | %endif |
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65 | |
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66 | ;========================================================================== |
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67 | |
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68 | ;-------------------------------------------------------------------- |
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69 | ; Find String In String |
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70 | ; |
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71 | ; FSIS |
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72 | ; Parameters: |
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73 | ; %1: String to search for (case-insensitive) |
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74 | ; %2: String to search in |
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75 | ; Returns: |
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76 | ; strpos: Position of %1 in %2 if found, 0 if not found |
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77 | ;-------------------------------------------------------------------- |
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78 | %macro FSIS 2.nolist |
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79 | %defstr s1 %1 |
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80 | %defstr s2 %2 |
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81 | %strlen sl1 s1 |
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82 | %strlen sl2 s2 |
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83 | %assign strpos 0 |
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84 | %if sl1 <= sl2 |
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85 | %assign strpos sl2 - sl1 + 1 |
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86 | %rep strpos |
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87 | %substr %%ss s2 strpos, sl1 |
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88 | %ifidni %%ss, s1 |
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89 | %exitrep |
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90 | %else |
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91 | %assign strpos strpos - 1 |
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92 | %endif |
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93 | %endrep |
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94 | %endif |
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95 | %endmacro |
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96 | |
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97 | |
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98 | %ifdef USE_NEC_V |
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99 | %include "NEC_V.inc" |
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100 | %endif |
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101 | |
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102 | |
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103 | ;-------------------------------------------------------------------- |
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104 | ; The undocumented instruction SALC (Set AL According to CF). |
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105 | ; Available on all Intel processors and truly compatible clones. |
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106 | ; Does not work on the NEC V20/V30 or Sony CXQ70108 processors. |
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107 | ; |
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108 | ; eSALC |
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109 | ; Parameters: |
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110 | ; Nothing |
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111 | ; Returns: |
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112 | ; AL: FFh if CF=1 |
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113 | ; 00h if CF=0 |
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114 | ; Corrupts registers: |
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115 | ; Nothing |
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116 | ;-------------------------------------------------------------------- |
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117 | %macro eSALC 0 |
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118 | ; db 0D6h |
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119 | salc |
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120 | %endmacro |
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121 | |
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122 | |
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123 | ;-------------------------------------------------------------------- |
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124 | ; The AAD instruction (ASCII Adjust before Division). |
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125 | ; Available on all Intel processors and truly compatible clones. |
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126 | ; Does not work on the NEC V20/V30 or Sony CXQ70108 processors |
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127 | ; unless %1 is 10 (0Ah). |
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128 | ; |
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129 | ; eAAD |
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130 | ; Parameters: |
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131 | ; %1: Any 8 bit number (0...255) |
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132 | ; Returns: |
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133 | ; AL: AH * %1 + AL |
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134 | ; AH: 0 |
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135 | ; Flags: Set according to result |
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136 | ; Corrupts registers: |
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137 | ; Nothing |
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138 | ;-------------------------------------------------------------------- |
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139 | %macro eAAD 1 |
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140 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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141 | %if %1 > 255 |
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142 | %error Invalid parameter passed to eAAD (%1 > 255) |
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143 | %else |
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144 | db 0D5h, %1 |
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145 | %endif |
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146 | %endif |
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147 | %endmacro |
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148 | |
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149 | |
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150 | ;-------------------------------------------------------------------- |
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151 | ; The AAM instruction (ASCII Adjust after Multiplication). |
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152 | ; |
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153 | ; eAAM |
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154 | ; Parameters: |
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155 | ; %1: Any 8 bit number except 0 (1...255) |
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156 | ; Returns: |
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157 | ; AL: AL MOD %1 |
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158 | ; AH: AL / %1 |
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159 | ; Flags: Set according to result |
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160 | ; Corrupts registers: |
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161 | ; Nothing |
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162 | ;-------------------------------------------------------------------- |
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163 | %macro eAAM 1 |
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164 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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165 | %if %1 > 255 |
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166 | %error Invalid parameter passed to eAAM (%1 > 255) |
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167 | %elif %1 = 0 |
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168 | %error Invalid parameter passed to eAAM (%1 = 0). This would cause a divide-by-zero exception! |
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169 | %else |
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170 | db 0D4h, %1 |
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171 | %endif |
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172 | %endif |
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173 | %endmacro |
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174 | |
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175 | |
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176 | ;-------------------------------------------------------------------- |
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177 | ; Emulates BSF (Bit Scan Forward) instruction when necessary. |
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178 | ; BSF is used to find index of least significant bit. |
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179 | ; |
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180 | ; eBSF |
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181 | ; Parameters: |
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182 | ; %1: Destination WORD Register for bit index (not CX or same as %2!) |
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183 | ; %2: Source WORD operand where to search bit (not CX or same as %1!) |
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184 | ; Returns: |
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185 | ; %1: Index of highest order bit from %2 |
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186 | ; ZF: Set if %2 is zero |
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187 | ; Cleared if %2 is non-zero |
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188 | ; Corrupts registers: |
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189 | ; Nothing |
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190 | ;-------------------------------------------------------------------- |
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191 | %macro eBSF 2 |
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192 | %ifndef USE_386 |
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193 | cmp WORD %2, BYTE 0 ; Source operand is zero? |
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194 | je SHORT %%Return ; If so, return with ZF set |
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195 | |
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196 | ; Set destination to zero and load mask for bit 0 |
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197 | push cx |
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198 | xor %1, %1 |
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199 | mov cx, 1 |
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200 | |
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201 | ALIGN JUMP_ALIGN |
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202 | %%BitLoop: |
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203 | test %2, cx ; Bit set? |
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204 | jnz SHORT %%PopAndReturn; If so, return with ZF cleared |
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205 | shl cx, 1 ; Prepare to test next bit |
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206 | inc %1 ; Increment bit index |
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207 | jmp SHORT %%BitLoop ; Loop until bit found |
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208 | %%PopAndReturn: |
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209 | pop cx |
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210 | %%Return: |
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211 | ;----------------------------------- |
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212 | %else |
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213 | bsf %1, %2 |
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214 | %endif |
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215 | %endmacro |
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216 | |
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217 | |
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218 | ;-------------------------------------------------------------------- |
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219 | ; Emulates BSR (Bit Scan Reverse) instruction when necessary. |
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220 | ; BSR is used to find index of most significant bit. |
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221 | ; |
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222 | ; eBSR |
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223 | ; Parameters: |
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224 | ; %1: Destination WORD Register for bit index (not CX or same as %2!) |
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225 | ; %2: Source WORD operand where to search bit (not CX or same as %1!) |
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226 | ; Returns: |
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227 | ; %1: Index of highest order bit from %2 |
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228 | ; ZF: Set if %2 is zero |
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229 | ; Cleared if %2 is non-zero |
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230 | ; Corrupts registers: |
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231 | ; Nothing |
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232 | ;-------------------------------------------------------------------- |
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233 | %macro eBSR 2 |
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234 | %ifndef USE_386 |
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235 | cmp WORD %2, BYTE 0 ; Source operand is zero? |
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236 | je SHORT %%Return ; If so, return with ZF set |
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237 | |
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238 | ; Load mask for highest order bit |
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239 | push cx |
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240 | mov cx, 1<<15 |
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241 | mov %1, 15 |
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242 | |
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243 | ALIGN JUMP_ALIGN |
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244 | %%BitLoop: |
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245 | test %2, cx ; Bit set? |
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246 | jnz SHORT %%PopAndReturn; If so, return with ZF cleared |
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247 | shr cx, 1 ; Prepare to test next bit |
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248 | dec %1 ; Decrement bit index |
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249 | jmp SHORT %%BitLoop ; Loop until bit found |
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250 | %%PopAndReturn: |
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251 | pop cx |
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252 | %%Return: |
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253 | ;----------------------------------- |
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254 | %else |
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255 | bsr %1, %2 |
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256 | %endif |
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257 | %endmacro |
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258 | |
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259 | |
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260 | ;-------------------------------------------------------------------- |
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261 | ; Conditional Move. |
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262 | ; |
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263 | ; eCMOVcc |
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264 | ; Parameters: |
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265 | ; %1: Destination data |
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266 | ; %2: Source data |
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267 | ; Returns: |
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268 | ; Nothing |
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269 | ; Corrupts registers: |
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270 | ; Nothing |
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271 | ;-------------------------------------------------------------------- |
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272 | %macro eCMOVA 2 |
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273 | jbe SHORT %%Return |
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274 | mov %1, %2 |
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275 | %%Return: |
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276 | %endmacro |
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277 | |
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278 | %macro eCMOVC 2 |
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279 | jnc SHORT %%Return |
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280 | mov %1, %2 |
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281 | %%Return: |
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282 | %endmacro |
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283 | |
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284 | %macro eCMOVNC 2 |
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285 | jc SHORT %%Return |
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286 | mov %1, %2 |
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287 | %%Return: |
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288 | %endmacro |
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289 | |
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290 | %macro eCMOVZ 2 |
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291 | jnz SHORT %%Return |
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292 | mov %1, %2 |
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293 | %%Return: |
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294 | %endmacro |
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295 | |
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296 | %macro eCMOVNZ 2 |
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297 | jz SHORT %%Return |
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298 | mov %1, %2 |
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299 | %%Return: |
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300 | %endmacro |
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301 | |
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302 | %macro eCMOVE 2 |
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303 | eCMOVZ %1, %2 |
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304 | %endmacro |
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305 | |
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306 | %macro eCMOVNE 2 |
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307 | eCMOVNZ %1, %2 |
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308 | %endmacro |
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309 | |
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310 | %macro eCMOVB 2 |
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311 | eCMOVC %1, %2 |
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312 | %endmacro |
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313 | |
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314 | %macro eCMOVS 2 |
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315 | jns SHORT %%Return |
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316 | mov %1, %2 |
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317 | %%Return: |
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318 | %endmacro |
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319 | |
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320 | %macro eCMOVNS 2 |
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321 | js SHORT %%Return |
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322 | mov %1, %2 |
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323 | %%Return: |
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324 | %endmacro |
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325 | |
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326 | |
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327 | ;-------------------------------------------------------------------- |
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328 | ; Conditional Set. |
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329 | ; |
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330 | ; eSETcc |
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331 | ; Parameters: |
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332 | ; %1: Destination data |
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333 | ; Returns: |
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334 | ; Nothing |
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335 | ; Corrupts registers: |
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336 | ; Flags |
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337 | ;-------------------------------------------------------------------- |
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338 | %macro eSETZ 1 |
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339 | mov %1, 0 ; Clear while preserving flags |
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340 | jnz SHORT %%Return ; Nothing to set |
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341 | inc %1 |
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342 | %%Return: |
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343 | %endmacro |
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344 | |
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345 | %macro eSETNZ 1 |
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346 | mov %1, 0 ; Clear while preserving flags |
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347 | jz SHORT %%Return ; Nothing to set |
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348 | inc %1 |
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349 | %%Return: |
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350 | %endmacro |
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351 | |
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352 | |
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353 | ;-------------------------------------------------------------------- |
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354 | ; Moves byte with zero-extending to any Register. |
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355 | ; |
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356 | ; eMOVZX |
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357 | ; Parameters: |
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358 | ; %1: Destination Register (SP not supported) |
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359 | ; %2: Byte register or byte address |
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360 | ; Returns: |
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361 | ; Nothing |
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362 | ; Corrupts registers: |
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363 | ; FLAGS |
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364 | ;-------------------------------------------------------------------- |
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365 | %macro eMOVZX 2 |
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366 | %ifndef USE_386 |
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367 | %ifidni %1, ax |
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368 | mov al, %2 |
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369 | xor ah, ah |
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370 | %elifidni %1, bx |
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371 | mov bl, %2 |
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372 | xor bh, bh ; %2 may use BX in effective address |
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373 | %elifidni %1, cx |
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374 | mov cl, %2 |
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375 | xor ch, ch |
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376 | %elifidni %1, dx |
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377 | mov dl, %2 |
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378 | xor dh, dh |
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379 | %else ; SI, DI, BP (all may be used in effective address) |
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380 | FSIS %1, %2 |
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381 | %if strpos |
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382 | push ax |
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383 | mov al, %2 |
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384 | xor ah, ah |
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385 | xchg %1, ax |
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386 | pop ax |
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387 | %else |
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388 | xchg %1, ax |
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389 | mov al, %2 |
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390 | xor ah, ah |
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391 | xchg %1, ax |
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392 | %endif |
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393 | %endif |
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394 | ;----------------------------------- |
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395 | %else |
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396 | movzx %1, %2 |
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397 | %endif |
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398 | %endmacro |
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399 | |
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400 | |
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401 | ;-------------------------------------------------------------------- |
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402 | ; Emulates PUSHA instruction when necessary. |
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403 | ; |
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404 | ; ePUSHA |
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405 | ; Parameters: |
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406 | ; Nothing |
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407 | ; Returns: |
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408 | ; Nothing |
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409 | ; Corrupts registers: |
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410 | ; Nothing |
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411 | ;-------------------------------------------------------------------- |
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412 | %macro ePUSHA 0 |
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413 | %ifndef USE_186 |
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414 | push ax |
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415 | push cx |
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416 | push dx |
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417 | push bx |
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418 | push sp |
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419 | push bp |
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420 | push si |
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421 | push di |
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422 | ;----------------------------------- |
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423 | %else |
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424 | pusha |
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425 | %endif |
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426 | %endmacro |
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427 | |
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428 | |
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429 | ;-------------------------------------------------------------------- |
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430 | ; Emulates POPA instruction when necessary. |
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431 | ; |
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432 | ; ePOPA |
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433 | ; Parameters: |
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434 | ; Nothing |
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435 | ; Returns: |
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436 | ; Nothing |
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437 | ; Corrupts registers: |
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438 | ; Nothing |
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439 | ;-------------------------------------------------------------------- |
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440 | %macro ePOPA 0 |
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441 | %ifndef USE_186 |
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442 | pop di |
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443 | pop si |
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444 | pop bp |
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445 | pop ax ; Skip SP |
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446 | pop bx |
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447 | pop dx |
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448 | pop cx |
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449 | pop ax |
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450 | ;----------------------------------- |
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451 | %else |
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452 | popa |
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453 | %endif |
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454 | %endmacro |
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455 | |
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456 | |
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457 | ;-------------------------------------------------------------------- |
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458 | ; Emulates ENTER instruction when necessary. |
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459 | ; |
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460 | ; eENTER |
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461 | ; Parameters: |
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462 | ; %1: Number of bytes to reserve from stack |
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463 | ; %2: The lexical nesting level (not emulated, set to 0) |
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464 | ; Returns: |
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465 | ; SS:BP: Ptr to old BP |
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466 | ; ([bp-2] points to highest local stack frame word) |
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467 | ; Corrupts registers: |
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468 | ; FLAGS |
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469 | ;-------------------------------------------------------------------- |
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470 | %macro eENTER 2 |
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471 | %ifndef USE_186 |
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472 | push bp |
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473 | mov bp, sp |
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474 | sub sp, %1 |
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475 | ;----------------------------------- |
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476 | %else |
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477 | enter %1, %2 |
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478 | %endif |
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479 | %endmacro |
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480 | |
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481 | ;-------------------------------------------------------------------- |
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482 | ; Emulates LEAVE instruction when necessary. |
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483 | ; |
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484 | ; eLEAVE |
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485 | ; Parameters: |
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486 | ; Nothing |
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487 | ; Returns: |
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488 | ; BP: What it was before eENTER |
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489 | ; Corrupts registers: |
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490 | ; Nothing |
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491 | ;-------------------------------------------------------------------- |
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492 | %macro eLEAVE 0 |
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493 | %ifndef USE_186 |
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494 | mov sp, bp |
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495 | pop bp |
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496 | ;----------------------------------- |
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497 | %else |
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498 | leave |
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499 | %endif |
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500 | %endmacro |
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501 | |
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502 | |
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503 | ;-------------------------------------------------------------------- |
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504 | ; Emulates LSS instruction when necessary. |
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505 | ; |
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506 | ; eLSS |
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507 | ; Parameters: |
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508 | ; %1: Destination register |
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509 | ; %2: Source memory address without brackets |
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510 | ; Returns: |
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511 | ; IF: 0 (interrupts disabled) |
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512 | ; Corrupts registers: |
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513 | ; Nothing |
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514 | ;-------------------------------------------------------------------- |
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515 | %macro eLSS 2 |
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516 | %ifndef USE_386 |
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517 | cli ; Disable interrupts |
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518 | mov %1, [%2] ; Load offset |
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519 | mov ss, [%2+2] ; Load segment |
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520 | ;----------------------------------- |
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521 | %else |
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522 | lss %1, [%2] |
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523 | %endif |
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524 | %endmacro |
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525 | |
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526 | |
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527 | ;-------------------------------------------------------------------- |
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528 | ; Repeats string instruction with segment override. |
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529 | ; This macro prevents 8088/8086 restart bug. |
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530 | ; |
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531 | ; eSEG_STR |
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532 | ; Parameters: |
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533 | ; %1: REP/REPE/REPZ or REPNE/REPNZ prefix |
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534 | ; %2: Source segment override (destination is always ES) |
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535 | ; %3: String instruction |
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536 | ; CX: Repeat count |
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537 | ; Returns: |
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538 | ; FLAGS for cmps and scas only |
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539 | ; Corrupts registers: |
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540 | ; FLAGS |
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541 | ;-------------------------------------------------------------------- |
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542 | %macro eSEG_STR 3 |
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543 | %ifndef USE_186 ; 8088/8086 has string instruction restart bug when more than one prefix |
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544 | %%Loop: |
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545 | %1 ; REP is the prefix that can be lost |
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546 | %2 ; SEG is the prefix that won't be lost |
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547 | %3 ; String instruction |
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548 | FSIS cmps, %3 |
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549 | %ifn strpos |
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550 | FSIS scas, %3 |
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551 | %endif |
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552 | %if strpos ; Must preserve FLAGS |
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553 | jcxz %%End ; Jump to end if no repeats left (preserves FLAGS) |
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554 | jmp SHORT %%Loop ; Loop while repeats left |
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555 | %%End: |
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556 | %else ; No need to preserve FLAGS |
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557 | inc cx |
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558 | loop %%Loop |
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559 | %endif |
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560 | %else ; No bug on V20/V30 and later, don't know about 188/186 |
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561 | %2 |
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562 | %1 %3 |
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563 | %endif |
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564 | %endmacro |
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565 | |
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566 | |
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567 | ;-------------------------------------------------------------------- |
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568 | ; Bit shifts and rotates with immediate. |
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569 | ; |
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570 | ; eSHIFT_IM |
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571 | ; Parameters: |
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572 | ; %1: Shift target |
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573 | ; %2: Number of bits to shift |
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574 | ; %3: Instruction (SHL, SHR, ROL, ROR, RCL, RCR) |
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575 | ; Returns: |
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576 | ; FLAGS |
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577 | ; Corrupts registers: |
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578 | ; Nothing |
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579 | ;-------------------------------------------------------------------- |
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580 | %macro eSHIFT_IM 3 |
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581 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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582 | %ifndef USE_186 |
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583 | %ifidni %1, cl |
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584 | times %2 %3 %1, 1 |
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585 | %elifidni %1, ch |
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586 | times %2 %3 %1, 1 |
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587 | %elifidni %1, cx |
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588 | times %2 %3 %1, 1 |
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589 | %else |
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590 | %if %2 > 3 ; Size optimized value |
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591 | push cx |
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592 | mov cl, %2 |
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593 | %3 %1, cl |
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594 | pop cx |
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595 | %else |
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596 | times %2 %3 %1, 1 |
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597 | %endif |
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598 | %endif |
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599 | ;----------------------------------- |
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600 | %else |
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601 | %3 %1, %2 |
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602 | %endif |
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603 | %endif |
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604 | %endmacro |
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605 | |
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606 | %macro eSHR_IM 2 |
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607 | eSHIFT_IM %1, %2, shr |
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608 | %endmacro |
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609 | |
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610 | %macro eSHL_IM 2 |
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611 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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612 | %ifdef USE_386 |
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613 | %if %2 = 1 |
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614 | FSIS ], %1 |
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615 | %if strpos |
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616 | eSHIFT_IM %1, %2, shl |
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617 | %else |
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618 | add %1, %1 ; Same size but faster on 386 and 486. |
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619 | %endif |
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620 | %else |
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621 | eSHIFT_IM %1, %2, shl |
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622 | %endif |
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623 | %else |
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624 | eSHIFT_IM %1, %2, shl |
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625 | %endif |
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626 | %endif |
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627 | %endmacro |
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628 | |
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629 | %macro eROR_IM 2 |
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630 | eSHIFT_IM %1, %2, ror |
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631 | %endmacro |
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632 | |
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633 | %macro eROL_IM 2 |
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634 | eSHIFT_IM %1, %2, rol |
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635 | %endmacro |
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636 | |
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637 | %macro eRCR_IM 2 |
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638 | eSHIFT_IM %1, %2, rcr |
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639 | %endmacro |
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640 | |
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641 | %macro eRCL_IM 2 |
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642 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS |
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643 | %ifdef USE_386 |
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644 | %if %2 = 1 |
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645 | FSIS ], %1 |
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646 | %if strpos |
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647 | eSHIFT_IM %1, %2, rcl |
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648 | %else |
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649 | adc %1, %1 ; Same size but faster on 386 and 486. |
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650 | %endif |
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651 | %else |
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652 | eSHIFT_IM %1, %2, rcl |
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653 | %endif |
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654 | %else |
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655 | eSHIFT_IM %1, %2, rcl |
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656 | %endif |
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657 | %endif |
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658 | %endmacro |
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659 | |
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660 | |
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661 | ;-------------------------------------------------------------------- |
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662 | ; Emulates PUSH imm instruction when necessary. |
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663 | ; |
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664 | ; ePUSH_I |
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665 | ; Parameters: |
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666 | ; %1: Immediate to push |
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667 | ; Returns: |
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668 | ; Nothing |
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669 | ; Corrupts registers: |
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670 | ; Nothing |
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671 | ;-------------------------------------------------------------------- |
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672 | %macro ePUSH_I 1 |
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673 | %ifndef USE_186 |
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674 | push bp ; Immediate goes here |
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675 | push bp |
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676 | mov bp, sp |
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677 | mov WORD [bp+2], %1 |
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678 | pop bp |
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679 | ;----------------------------------- |
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680 | %else |
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681 | push %1 |
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682 | %endif |
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683 | %endmacro |
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684 | |
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685 | |
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686 | ;-------------------------------------------------------------------- |
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687 | ; Emulates PUSH imm instruction when necessary. |
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688 | ; ePUSH_T uses temporary register for faster performance |
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689 | ; and smaller code size than ePUSH_I. |
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690 | ; |
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691 | ; ePUSH_T |
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692 | ; Parameters: |
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693 | ; %1: Temporary Register |
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694 | ; %2: Immediate to push |
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695 | ; Returns: |
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696 | ; Nothing |
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697 | ; Corrupts registers: |
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698 | ; %1 |
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699 | ;-------------------------------------------------------------------- |
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700 | %macro ePUSH_T 2 |
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701 | %ifndef USE_186 |
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702 | %ifidni %2, 0 |
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703 | xor %1, %1 |
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704 | %else |
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705 | mov %1, %2 |
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706 | %endif |
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707 | push %1 |
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708 | ;----------------------------------- |
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709 | %else |
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710 | push %2 |
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711 | %endif |
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712 | %endmacro |
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713 | |
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714 | |
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715 | %endif ; EMULATE_INC |
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